radeon/uvd: fix calc_ctx_size_h265_main10
Left shift was applied twice. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110702 Reviewed-by: Leo Liu <leo.liu@amd.com> Tested-by: <irherder@gmail.com> Signed-off-by: Marek Olšák <marek.olsak@amd.com> Cc: <mesa-stable@lists.freedesktop.org>
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@ -247,7 +247,7 @@ static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec)
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static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_h265_picture_desc *pic)
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{
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unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
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unsigned log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
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unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
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unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
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@ -262,8 +262,8 @@ static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_
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else
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max_references = MAX2(max_references, 17);
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block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
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log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
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log2_ctb_size = pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3 +
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pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
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width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
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height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
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@ -298,7 +298,7 @@ static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec)
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static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_h265_picture_desc *pic)
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{
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unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
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unsigned log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
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unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
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unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
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@ -313,8 +313,8 @@ static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_
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else
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max_references = MAX2(max_references, 17);
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block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
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log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
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log2_ctb_size = pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3 +
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pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
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width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
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height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
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@ -552,7 +552,7 @@ static unsigned calc_ctx_size_h265_main(struct radeon_decoder *dec)
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static unsigned calc_ctx_size_h265_main10(struct radeon_decoder *dec, struct pipe_h265_picture_desc *pic)
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{
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unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
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unsigned log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
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unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
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unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
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@ -568,8 +568,8 @@ static unsigned calc_ctx_size_h265_main10(struct radeon_decoder *dec, struct pip
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else
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max_references = MAX2(max_references, 17);
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block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
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log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
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log2_ctb_size = pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3 +
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pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
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width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
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height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
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