i965: Add all device ids for sandybridge
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@ -71,9 +71,13 @@
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#define PCI_CHIP_ILD_G 0x0042
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#define PCI_CHIP_ILM_G 0x0046
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#define PCI_CHIP_SANDYBRIDGE 0x0102
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#define PCI_CHIP_SANDYBRIDGE_M 0x0106
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#define PCI_CHIP_SANDYBRIDGE_M_D0 0x0126
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#define PCI_CHIP_SANDYBRIDGE_GT1 0x0102 /* Desktop */
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#define PCI_CHIP_SANDYBRIDGE_GT2 0x0112
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#define PCI_CHIP_SANDYBRIDGE_GT2_PLUS 0x0122
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#define PCI_CHIP_SANDYBRIDGE_M_GT1 0x0106 /* Mobile */
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#define PCI_CHIP_SANDYBRIDGE_M_GT2 0x0116
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#define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126
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#define PCI_CHIP_SANDYBRIDGE_S 0x010A /* Server */
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#define IS_MOBILE(devid) (devid == PCI_CHIP_I855_GM || \
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devid == PCI_CHIP_I915_GM || \
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@ -119,9 +123,13 @@
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/* Compat macro for intel_decode.c */
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#define IS_IRONLAKE(devid) IS_GEN5(devid)
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#define IS_GEN6(devid) (devid == PCI_CHIP_SANDYBRIDGE || \
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devid == PCI_CHIP_SANDYBRIDGE_M || \
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devid == PCI_CHIP_SANDYBRIDGE_M_D0)
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#define IS_GEN6(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \
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devid == PCI_CHIP_SANDYBRIDGE_GT2 || \
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devid == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \
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devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
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devid == PCI_CHIP_SANDYBRIDGE_M_GT2 || \
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devid == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS || \
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devid == PCI_CHIP_SANDYBRIDGE_S)
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#define IS_965(devid) (IS_GEN4(devid) || \
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IS_G4X(devid) || \
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