From c7d91a6f13d9dafe47cfa948619083258bc47cb0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Thu, 3 Oct 2013 18:16:08 +0200 Subject: [PATCH] =?UTF-8?q?r600g:=20fix=20=C3=ADnitialization=20of=20non?= =?UTF-8?q?=5Fdisp=5Ftiling=20flag?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This fixes a regression caused by e64633e8c3a5498998a45ab721bf80edca101cf5 --- src/gallium/drivers/radeon/r600_texture.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index e83ce836309..ebb7090697d 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -515,10 +515,6 @@ r600_texture_create_object(struct pipe_screen *screen, /* don't include stencil-only formats which we don't support for rendering */ rtex->is_depth = util_format_has_depth(util_format_description(rtex->resource.b.b.format)); - /* Tiled depth textures utilize the non-displayable tile order. - * Applies to R600-Cayman. */ - rtex->non_disp_tiling = rtex->is_depth && rtex->surface.level[0].mode >= RADEON_SURF_MODE_1D; - rtex->surface = *surface; r = r600_setup_surface(screen, rtex, pitch_in_bytes_override); if (r) { @@ -526,6 +522,11 @@ r600_texture_create_object(struct pipe_screen *screen, return NULL; } + /* Tiled depth textures utilize the non-displayable tile order. + * This must be done after r600_setup_surface. + * Applies to R600-Cayman. */ + rtex->non_disp_tiling = rtex->is_depth && rtex->surface.level[0].mode >= RADEON_SURF_MODE_1D; + if (base->nr_samples > 1 && !rtex->is_depth && !buf) { r600_texture_allocate_fmask(rscreen, rtex); r600_texture_allocate_cmask(rscreen, rtex);