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freedreno: consolidate GMEM state 

The tile and vsc_pipe arrays are really part of the GMEM configuration.
So pull these out of fd_context and into fd_gmem_stateobj.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3503>
This commit is contained in:
Rob Clark 2020-01-21 10:47:45 -08:00 committed by Marge Bot
parent 62c10b395e
commit c7ab8874d0
8 changed files with 24 additions and 19 deletions
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2
src/gallium/drivers/freedreno/a2xx/fd2_gmem.c
View File

@ -609,7 +609,7 @@ fd2_emit_tile_init(struct fd_batch *batch)
OUT_RING(ring, 0x0000018C);
for (int i = 0; i < gmem->num_vsc_pipes; i++) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
float off_x, off_y, mul_x, mul_y;
/* const to tranform from [-1,1] to bin coordinates for this pipe

5
src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
View File

@ -777,6 +777,7 @@ static void
update_vsc_pipe(struct fd_batch *batch)
{
struct fd_context *ctx = batch->ctx;
struct fd_gmem_stateobj *gmem = &ctx->gmem;
struct fd3_context *fd3_ctx = fd3_context(ctx);
struct fd_ringbuffer *ring = batch->gmem;
int i;
@ -785,7 +786,7 @@ update_vsc_pipe(struct fd_batch *batch)
OUT_RELOCW(ring, fd3_ctx->vsc_size_mem, 0, 0, 0); /* VSC_SIZE_ADDRESS */
for (i = 0; i < 8; i++) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
if (!ctx->vsc_pipe_bo[i]) {
ctx->vsc_pipe_bo[i] = fd_bo_new(ctx->dev, 0x40000,
@ -1018,7 +1019,7 @@ fd3_emit_tile_renderprep(struct fd_batch *batch, struct fd_tile *tile)
}
if (use_hw_binning(batch)) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[tile->p];
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[tile->p];
struct fd_bo *pipe_bo = ctx->vsc_pipe_bo[tile->p];
assert(pipe->w && pipe->h);

5
src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
View File

@ -561,6 +561,7 @@ static void
update_vsc_pipe(struct fd_batch *batch)
{
struct fd_context *ctx = batch->ctx;
struct fd_gmem_stateobj *gmem = &ctx->gmem;
struct fd4_context *fd4_ctx = fd4_context(ctx);
struct fd_ringbuffer *ring = batch->gmem;
int i;
@ -570,7 +571,7 @@ update_vsc_pipe(struct fd_batch *batch)
OUT_PKT0(ring, REG_A4XX_VSC_PIPE_CONFIG_REG(0), 8);
for (i = 0; i < 8; i++) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
OUT_RING(ring, A4XX_VSC_PIPE_CONFIG_REG_X(pipe->x) |
A4XX_VSC_PIPE_CONFIG_REG_Y(pipe->y) |
A4XX_VSC_PIPE_CONFIG_REG_W(pipe->w) |
@ -766,7 +767,7 @@ fd4_emit_tile_renderprep(struct fd_batch *batch, struct fd_tile *tile)
uint32_t y2 = tile->yoff + tile->bin_h - 1;
if (use_hw_binning(batch)) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[tile->p];
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[tile->p];
struct fd_bo *pipe_bo = ctx->vsc_pipe_bo[tile->p];
assert(pipe->w && pipe->h);

5
src/gallium/drivers/freedreno/a5xx/fd5_gmem.c
View File

@ -277,7 +277,7 @@ update_vsc_pipe(struct fd_batch *batch)
OUT_PKT4(ring, REG_A5XX_VSC_PIPE_CONFIG_REG(0), 16);
for (i = 0; i < 16; i++) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
OUT_RING(ring, A5XX_VSC_PIPE_CONFIG_REG_X(pipe->x) |
A5XX_VSC_PIPE_CONFIG_REG_Y(pipe->y) |
A5XX_VSC_PIPE_CONFIG_REG_W(pipe->w) |
@ -413,6 +413,7 @@ static void
fd5_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
{
struct fd_context *ctx = batch->ctx;
struct fd_gmem_stateobj *gmem = &ctx->gmem;
struct fd5_context *fd5_ctx = fd5_context(ctx);
struct fd_ringbuffer *ring = batch->gmem;
@ -434,7 +435,7 @@ fd5_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
A5XX_RB_RESOLVE_CNTL_2_Y(y2));
if (use_hw_binning(batch)) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[tile->p];
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[tile->p];
struct fd_bo *pipe_bo = ctx->vsc_pipe_bo[tile->p];
OUT_PKT7(ring, CP_WAIT_FOR_ME, 0);

5
src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
View File

@ -358,7 +358,7 @@ update_vsc_pipe(struct fd_batch *batch)
OUT_PKT4(ring, REG_A6XX_VSC_PIPE_CONFIG_REG(0), 32);
for (i = 0; i < 32; i++) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
OUT_RING(ring, A6XX_VSC_PIPE_CONFIG_REG_X(pipe->x) |
A6XX_VSC_PIPE_CONFIG_REG_Y(pipe->y) |
A6XX_VSC_PIPE_CONFIG_REG_W(pipe->w) |
@ -822,6 +822,7 @@ static void
fd6_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
{
struct fd_context *ctx = batch->ctx;
struct fd_gmem_stateobj *gmem = &ctx->gmem;
struct fd6_context *fd6_ctx = fd6_context(ctx);
struct fd_ringbuffer *ring = batch->gmem;
@ -838,7 +839,7 @@ fd6_emit_tile_prep(struct fd_batch *batch, struct fd_tile *tile)
set_scissor(ring, x1, y1, x2, y2);
if (use_hw_binning(batch)) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[tile->p];
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[tile->p];
OUT_PKT7(ring, CP_WAIT_FOR_ME, 0);

2
src/gallium/drivers/freedreno/freedreno_context.h
View File

@ -266,8 +266,6 @@ struct fd_context {
* means we'd always have to recalc tiles ever batch)
*/
struct fd_gmem_stateobj gmem;
struct fd_vsc_pipe vsc_pipe[32];
struct fd_tile tile[512];
/* Per vsc pipe bo's (a2xx-a5xx): */
struct fd_bo *vsc_pipe_bo[32];

16
src/gallium/drivers/freedreno/freedreno_gmem.c
View File

@ -253,7 +253,7 @@ calculate_tiles(struct fd_batch *batch)
/* configure pipes: */
xoff = yoff = 0;
for (i = 0; i < npipes; i++) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
if (xoff >= nbins_x) {
xoff = 0;
@ -276,14 +276,14 @@ calculate_tiles(struct fd_batch *batch)
gmem->num_vsc_pipes = MAX2(1, i);
for (; i < npipes; i++) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
pipe->x = pipe->y = pipe->w = pipe->h = 0;
}
if (BIN_DEBUG) {
printf("%dx%d ... tpp=%dx%d\n", nbins_x, nbins_y, tpp_x, tpp_y);
for (i = 0; i < ARRAY_SIZE(ctx->vsc_pipe); i++) {
struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
for (i = 0; i < ARRAY_SIZE(gmem->vsc_pipe); i++) {
struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
printf("pipe[%d]: %ux%u @ %u,%u\n", i,
pipe->w, pipe->h, pipe->x, pipe->y);
}
@ -302,10 +302,10 @@ calculate_tiles(struct fd_batch *batch)
bh = MIN2(bin_h, miny + height - yoff);
for (j = 0; j < nbins_x; j++) {
struct fd_tile *tile = &ctx->tile[t];
struct fd_tile *tile = &gmem->tile[t];
uint32_t p;
assert(t < ARRAY_SIZE(ctx->tile));
assert(t < ARRAY_SIZE(gmem->tile));
/* pipe number: */
p = ((i / tpp_y) * div_round_up(nbins_x, tpp_x)) + (j / tpp_x);
@ -338,7 +338,7 @@ calculate_tiles(struct fd_batch *batch)
t = 0;
for (i = 0; i < nbins_y; i++) {
for (j = 0; j < nbins_x; j++) {
struct fd_tile *tile = &ctx->tile[t++];
struct fd_tile *tile = &gmem->tile[t++];
printf("|p:%u n:%u|", tile->p, tile->n);
}
printf("\n");
@ -359,7 +359,7 @@ render_tiles(struct fd_batch *batch)
ctx->stats.batch_restore++;
for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
struct fd_tile *tile = &ctx->tile[i];
struct fd_tile *tile = &gmem->tile[i];
DBG("bin_h=%d, yoff=%d, bin_w=%d, xoff=%d",
tile->bin_h, tile->yoff, tile->bin_w, tile->xoff);

3
src/gallium/drivers/freedreno/freedreno_gmem.h
View File

@ -56,6 +56,9 @@ struct fd_gmem_stateobj {
uint16_t width, height;
uint16_t maxpw, maxph; /* maximum pipe width/height */
uint8_t num_vsc_pipes; /* number of pipes for a20x */
struct fd_vsc_pipe vsc_pipe[32];
struct fd_tile tile[512];
};
struct fd_batch;