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ir3,turnip: Add support for GL_KHR_shader_subgroup_quad 

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13817>
This commit is contained in:
Danylo Piliaiev 2021-11-16 16:27:26 +02:00 committed by Marge Bot
parent 3dfd4230bb
commit c749da6135
4 changed files with 41 additions and 0 deletions
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4
src/freedreno/ir3/ir3.h
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@ -2196,6 +2196,10 @@ INSTR2(ATOMIC_AND)
INSTR2(ATOMIC_OR)
INSTR2(ATOMIC_XOR)
INSTR2(LDC)
INSTR2(QUAD_SHUFFLE_BRCST)
INSTR1(QUAD_SHUFFLE_HORIZ)
INSTR1(QUAD_SHUFFLE_VERT)
INSTR1(QUAD_SHUFFLE_DIAG)
#if GPU >= 600
INSTR3NODST(STIB);
INSTR2(LDIB);

35
src/freedreno/ir3/ir3_compiler_nir.c
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@ -2247,6 +2247,41 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
break;
}
case nir_intrinsic_quad_broadcast: {
struct ir3_instruction *src = ir3_get_src(ctx, &intr->src[0])[0];
struct ir3_instruction *idx = ir3_get_src(ctx, &intr->src[1])[0];
type_t dst_type = type_uint_size(nir_dest_bit_size(intr->dest));
if (dst_type != TYPE_U32)
idx = ir3_COV(ctx->block, idx, TYPE_U32, dst_type);
dst[0] = ir3_QUAD_SHUFFLE_BRCST(ctx->block, src, 0, idx, 0);
dst[0]->cat5.type = dst_type;
break;
}
case nir_intrinsic_quad_swap_horizontal: {
struct ir3_instruction *src = ir3_get_src(ctx, &intr->src[0])[0];
dst[0] = ir3_QUAD_SHUFFLE_HORIZ(ctx->block, src, 0);
dst[0]->cat5.type = type_uint_size(nir_dest_bit_size(intr->dest));
break;
}
case nir_intrinsic_quad_swap_vertical: {
struct ir3_instruction *src = ir3_get_src(ctx, &intr->src[0])[0];
dst[0] = ir3_QUAD_SHUFFLE_VERT(ctx->block, src, 0);
dst[0]->cat5.type = type_uint_size(nir_dest_bit_size(intr->dest));
break;
}
case nir_intrinsic_quad_swap_diagonal: {
struct ir3_instruction *src = ir3_get_src(ctx, &intr->src[0])[0];
dst[0] = ir3_QUAD_SHUFFLE_DIAG(ctx->block, src, 0);
dst[0]->cat5.type = type_uint_size(nir_dest_bit_size(intr->dest));
break;
}
case nir_intrinsic_load_shared_ir3:
emit_intrinsic_load_shared_ir3(ctx, intr, dst);
break;

1
src/freedreno/vulkan/tu_device.c
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@ -809,6 +809,7 @@ tu_get_physical_device_properties_1_1(struct tu_physical_device *pdevice,
VK_SUBGROUP_FEATURE_BALLOT_BIT;
if (pdevice->info->a6xx.has_getfiberid) {
p->subgroupSupportedStages |= VK_SHADER_STAGE_ALL_GRAPHICS;
p->subgroupSupportedOperations |= VK_SUBGROUP_FEATURE_QUAD_BIT;
}
p->subgroupQuadOperationsInAllStages = false;

1
src/freedreno/vulkan/tu_shader.c
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@ -81,6 +81,7 @@ tu_spirv_to_nir(struct tu_device *dev,
.subgroup_basic = true,
.subgroup_ballot = true,
.subgroup_vote = true,
.subgroup_quad = true,
.physical_storage_buffer_address = true,
},
};