i965/skl: Utilize new 5th bit for gateway messages

Cc: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
This commit is contained in:
Ben Widawsky 2016-01-26 15:42:08 -08:00
parent a1ea45b857
commit c5dc6cdf26
1 changed files with 3 additions and 1 deletions

View File

@ -926,6 +926,8 @@ void
fs_visitor::emit_barrier()
{
assert(devinfo->gen >= 7);
const uint32_t barrier_id_mask =
devinfo->gen >= 9 ? 0x8f000000u : 0x0f000000u;
/* We are getting the barrier ID from the compute shader header */
assert(stage == MESA_SHADER_COMPUTE);
@ -939,7 +941,7 @@ fs_visitor::emit_barrier()
/* Copy bits 27:24 of r0.2 (barrier id) to the message payload reg.2 */
fs_reg r0_2 = fs_reg(retype(brw_vec1_grf(0, 2), BRW_REGISTER_TYPE_UD));
pbld.AND(component(payload, 2), r0_2, brw_imm_ud(0x0f000000u));
pbld.AND(component(payload, 2), r0_2, brw_imm_ud(barrier_id_mask));
/* Emit a gateway "barrier" message using the payload we set up, followed
* by a wait instruction.