svga: move svga_is_format_supported() to svga_format.c
where the other format-related functions live. Reviewed-by: Charmaine Lee <charmainel@vmware.com>
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@ -2070,3 +2070,122 @@ svga_linear_to_srgb(SVGA3dSurfaceFormat format)
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return format;
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}
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}
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/**
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* Implement pipe_screen::is_format_supported().
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* \param bindings bitmask of PIPE_BIND_x flags
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*/
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boolean
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svga_is_format_supported(struct pipe_screen *screen,
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enum pipe_format format,
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enum pipe_texture_target target,
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unsigned sample_count,
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unsigned bindings)
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{
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struct svga_screen *ss = svga_screen(screen);
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SVGA3dSurfaceFormat svga_format;
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SVGA3dSurfaceFormatCaps caps;
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SVGA3dSurfaceFormatCaps mask;
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assert(bindings);
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if (sample_count > 1) {
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/* In ms_samples, if bit N is set it means that we support
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* multisample with N+1 samples per pixel.
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*/
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if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
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return FALSE;
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}
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}
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svga_format = svga_translate_format(ss, format, bindings);
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if (svga_format == SVGA3D_FORMAT_INVALID) {
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return FALSE;
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}
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if (!ss->sws->have_vgpu10 &&
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util_format_is_srgb(format) &&
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(bindings & PIPE_BIND_DISPLAY_TARGET)) {
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/* We only support sRGB rendering with vgpu10 */
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return FALSE;
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}
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/*
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* For VGPU10 vertex formats, skip querying host capabilities
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*/
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if (ss->sws->have_vgpu10 && (bindings & PIPE_BIND_VERTEX_BUFFER)) {
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SVGA3dSurfaceFormat svga_format;
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unsigned flags;
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svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
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return svga_format != SVGA3D_FORMAT_INVALID;
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}
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/*
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* Override host capabilities, so that we end up with the same
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* visuals for all virtual hardware implementations.
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*/
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if (bindings & PIPE_BIND_DISPLAY_TARGET) {
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switch (svga_format) {
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case SVGA3D_A8R8G8B8:
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case SVGA3D_X8R8G8B8:
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case SVGA3D_R5G6B5:
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break;
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/* VGPU10 formats */
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case SVGA3D_B8G8R8A8_UNORM:
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case SVGA3D_B8G8R8X8_UNORM:
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case SVGA3D_B5G6R5_UNORM:
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case SVGA3D_B8G8R8X8_UNORM_SRGB:
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case SVGA3D_B8G8R8A8_UNORM_SRGB:
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case SVGA3D_R8G8B8A8_UNORM_SRGB:
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break;
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/* Often unsupported/problematic. This means we end up with the same
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* visuals for all virtual hardware implementations.
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*/
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case SVGA3D_A4R4G4B4:
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case SVGA3D_A1R5G5B5:
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return FALSE;
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default:
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return FALSE;
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}
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}
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/*
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* Query the host capabilities.
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*/
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svga_get_format_cap(ss, svga_format, &caps);
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if (bindings & PIPE_BIND_RENDER_TARGET) {
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/* Check that the color surface is blendable, unless it's an
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* integer format.
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*/
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if (!svga_format_is_integer(svga_format) &&
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(caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
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return FALSE;
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}
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}
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mask.value = 0;
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if (bindings & PIPE_BIND_RENDER_TARGET) {
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mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
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}
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if (bindings & PIPE_BIND_DEPTH_STENCIL) {
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mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
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}
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if (bindings & PIPE_BIND_SAMPLER_VIEW) {
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mask.value |= SVGA3DFORMAT_OP_TEXTURE;
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}
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if (target == PIPE_TEXTURE_CUBE) {
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mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
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}
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else if (target == PIPE_TEXTURE_3D) {
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mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
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}
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return (caps.value & mask.value) == mask.value;
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}
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@ -120,4 +120,14 @@ svga_format_is_shareable(const struct svga_screen *ss,
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SVGA3dSurfaceFormat
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svga_linear_to_srgb(SVGA3dSurfaceFormat format);
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boolean
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svga_is_format_supported(struct pipe_screen *screen,
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enum pipe_format format,
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enum pipe_texture_target target,
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unsigned sample_count,
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unsigned bindings);
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#endif /* SVGA_FORMAT_H_ */
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@ -739,127 +739,6 @@ svga_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader,
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}
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/**
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* Implement pipe_screen::is_format_supported().
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* \param bindings bitmask of PIPE_BIND_x flags
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*/
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static boolean
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svga_is_format_supported( struct pipe_screen *screen,
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enum pipe_format format,
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enum pipe_texture_target target,
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unsigned sample_count,
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unsigned bindings)
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{
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struct svga_screen *ss = svga_screen(screen);
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SVGA3dSurfaceFormat svga_format;
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SVGA3dSurfaceFormatCaps caps;
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SVGA3dSurfaceFormatCaps mask;
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assert(bindings);
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if (sample_count > 1) {
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/* In ms_samples, if bit N is set it means that we support
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* multisample with N+1 samples per pixel.
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*/
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if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
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return FALSE;
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}
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}
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svga_format = svga_translate_format(ss, format, bindings);
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if (svga_format == SVGA3D_FORMAT_INVALID) {
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return FALSE;
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}
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if (!ss->sws->have_vgpu10 &&
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util_format_is_srgb(format) &&
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(bindings & PIPE_BIND_DISPLAY_TARGET)) {
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/* We only support sRGB rendering with vgpu10 */
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return FALSE;
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}
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/*
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* For VGPU10 vertex formats, skip querying host capabilities
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*/
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if (ss->sws->have_vgpu10 && (bindings & PIPE_BIND_VERTEX_BUFFER)) {
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SVGA3dSurfaceFormat svga_format;
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unsigned flags;
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svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
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return svga_format != SVGA3D_FORMAT_INVALID;
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}
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/*
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* Override host capabilities, so that we end up with the same
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* visuals for all virtual hardware implementations.
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*/
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if (bindings & PIPE_BIND_DISPLAY_TARGET) {
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switch (svga_format) {
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case SVGA3D_A8R8G8B8:
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case SVGA3D_X8R8G8B8:
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case SVGA3D_R5G6B5:
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break;
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/* VGPU10 formats */
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case SVGA3D_B8G8R8A8_UNORM:
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case SVGA3D_B8G8R8X8_UNORM:
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case SVGA3D_B5G6R5_UNORM:
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case SVGA3D_B8G8R8X8_UNORM_SRGB:
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case SVGA3D_B8G8R8A8_UNORM_SRGB:
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case SVGA3D_R8G8B8A8_UNORM_SRGB:
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break;
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/* Often unsupported/problematic. This means we end up with the same
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* visuals for all virtual hardware implementations.
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*/
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case SVGA3D_A4R4G4B4:
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case SVGA3D_A1R5G5B5:
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return FALSE;
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default:
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return FALSE;
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}
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}
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/*
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* Query the host capabilities.
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*/
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svga_get_format_cap(ss, svga_format, &caps);
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if (bindings & PIPE_BIND_RENDER_TARGET) {
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/* Check that the color surface is blendable, unless it's an
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* integer format.
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*/
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if (!svga_format_is_integer(svga_format) &&
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(caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
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return FALSE;
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}
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}
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mask.value = 0;
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if (bindings & PIPE_BIND_RENDER_TARGET) {
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mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
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}
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if (bindings & PIPE_BIND_DEPTH_STENCIL) {
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mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
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}
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if (bindings & PIPE_BIND_SAMPLER_VIEW) {
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mask.value |= SVGA3DFORMAT_OP_TEXTURE;
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}
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if (target == PIPE_TEXTURE_CUBE) {
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mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
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}
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else if (target == PIPE_TEXTURE_3D) {
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mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
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}
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return (caps.value & mask.value) == mask.value;
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}
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static void
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svga_fence_reference(struct pipe_screen *screen,
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struct pipe_fence_handle **ptr,
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