radeonsi: cleanup disabling tiling for UVD v3
Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=63702 v2: add a comment that this is just a workaround v3: fix typo in comment Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
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@ -76,6 +76,8 @@ struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe
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template.height = align(tmpl->height / depth, VL_MACROBLOCK_HEIGHT);
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vl_vide_buffer_template(&templ, &template, resource_formats[0], depth, PIPE_USAGE_STATIC, 0);
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/* TODO: Setting the transfer flag is only a workaround till we get tiling working */
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templ.flags = R600_RESOURCE_FLAG_TRANSFER;
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resources[0] = (struct r600_resource_texture *)
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pipe->screen->resource_create(pipe->screen, &templ);
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if (!resources[0])
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@ -83,6 +85,7 @@ struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe
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if (resource_formats[1] != PIPE_FORMAT_NONE) {
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vl_vide_buffer_template(&templ, &template, resource_formats[1], depth, PIPE_USAGE_STATIC, 1);
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templ.flags = R600_RESOURCE_FLAG_TRANSFER;
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resources[1] = (struct r600_resource_texture *)
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pipe->screen->resource_create(pipe->screen, &templ);
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if (!resources[1])
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@ -91,6 +94,7 @@ struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe
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if (resource_formats[2] != PIPE_FORMAT_NONE) {
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vl_vide_buffer_template(&templ, &template, resource_formats[2], depth, PIPE_USAGE_STATIC, 2);
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templ.flags = R600_RESOURCE_FLAG_TRANSFER;
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resources[2] = (struct r600_resource_texture *)
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pipe->screen->resource_create(pipe->screen, &templ);
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if (!resources[2])
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@ -114,9 +118,6 @@ struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe
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/* recreate the CS handle */
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resources[i]->resource.cs_buf = ctx->ws->buffer_get_cs_handle(
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resources[i]->resource.buf);
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/* TODO: tiling used to work with UVD on SI */
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resources[i]->surface.level[0].mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
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}
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template.height *= depth;
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