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winsys/radeon: Use a single buffer cache manager again 

The trick is to generate a unique buffer usage value for each possible
combination of domains and flags, with only one bit set each for the
domains and flags. This ensures pb_check_usage() only returns TRUE when
the domains and flags the cached buffer was created for exactly match
the requested ones.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Michel Dänzer 2014-10-16 15:10:20 +09:00 committed by Michel Dänzer
parent e1d363b3ff
commit c4db733fac
3 changed files with 21 additions and 37 deletions
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23
src/gallium/winsys/radeon/drm/radeon_drm_bo.c
View File

@ -816,21 +816,24 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
memset(&desc, 0, sizeof(desc));
desc.base.alignment = alignment;
/* Additional criteria for the cache manager. */
desc.base.usage = domain;
/* Only set one usage bit each for domains and flags, or the cache manager
* might consider different sets of domains / flags compatible
*/
if (domain == RADEON_DOMAIN_VRAM_GTT)
desc.base.usage = 1 << 2;
else
desc.base.usage = domain >> 1;
assert(flags < sizeof(desc.base.usage) * 8 - 3);
desc.base.usage |= 1 << (flags + 3);
desc.initial_domains = domain;
desc.flags = flags;
/* Assign a buffer manager. */
assert(flags < RADEON_NUM_CACHE_MANAGERS);
if (use_reusable_pool) {
if (domain == RADEON_DOMAIN_VRAM)
provider = ws->cman_vram[flags];
else
provider = ws->cman_gtt[flags];
} else {
if (use_reusable_pool)
provider = ws->cman;
else
provider = ws->kman;
}
buffer = provider->create_buffer(provider, size, &desc.base);
if (!buffer)

30
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
View File

@ -441,7 +441,6 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
static void radeon_winsys_destroy(struct radeon_winsys *rws)
{
struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
int i;
if (ws->thread) {
ws->kill_thread = 1;
@ -454,10 +453,7 @@ static void radeon_winsys_destroy(struct radeon_winsys *rws)
pipe_mutex_destroy(ws->cmask_owner_mutex);
pipe_mutex_destroy(ws->cs_stack_lock);
for (i = 0; i < RADEON_NUM_CACHE_MANAGERS; i++) {
ws->cman_gtt[i]->destroy(ws->cman_gtt[i]);
ws->cman_vram[i]->destroy(ws->cman_vram[i]);
}
ws->cman->destroy(ws->cman);
ws->kman->destroy(ws->kman);
if (ws->gen >= DRV_R600) {
radeon_surface_manager_free(ws->surf_man);
@ -644,7 +640,6 @@ PUBLIC struct radeon_winsys *
radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
{
struct radeon_drm_winsys *ws;
int i;
pipe_mutex_lock(fd_tab_mutex);
if (!fd_tab) {
@ -674,17 +669,10 @@ radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
if (!ws->kman)
goto fail;
for (i = 0; i < RADEON_NUM_CACHE_MANAGERS; i++) {
ws->cman_vram[i] = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0,
ws->info.vram_size / 8);
if (!ws->cman_vram[i])
goto fail;
ws->cman_gtt[i] = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0,
ws->info.gart_size / 8);
if (!ws->cman_gtt[i])
goto fail;
}
ws->cman = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0,
(ws->info.vram_size + ws->info.gart_size) / 8);
if (!ws->cman)
goto fail;
if (ws->gen >= DRV_R600) {
ws->surf_man = radeon_surface_manager_new(fd);
@ -739,12 +727,8 @@ radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
fail:
pipe_mutex_unlock(fd_tab_mutex);
for (i = 0; i < RADEON_NUM_CACHE_MANAGERS; i++) {
if (ws->cman_gtt[i])
ws->cman_gtt[i]->destroy(ws->cman_gtt[i]);
if (ws->cman_vram[i])
ws->cman_vram[i]->destroy(ws->cman_vram[i]);
}
if (ws->cman)
ws->cman->destroy(ws->cman);
if (ws->kman)
ws->kman->destroy(ws->kman);
if (ws->surf_man)

5
src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
View File

@ -41,8 +41,6 @@ enum radeon_generation {
DRV_SI
};
#define RADEON_NUM_CACHE_MANAGERS 8
struct radeon_drm_winsys {
struct radeon_winsys base;
struct pipe_reference reference;
@ -60,8 +58,7 @@ struct radeon_drm_winsys {
uint32_t accel_working2;
struct pb_manager *kman;
struct pb_manager *cman_vram[RADEON_NUM_CACHE_MANAGERS];
struct pb_manager *cman_gtt[RADEON_NUM_CACHE_MANAGERS];
struct pb_manager *cman;
struct radeon_surface_manager *surf_man;
uint32_t num_cpus; /* Number of CPUs. */