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nir: Allow for system values with variable numbers of destination components 

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5927>
This commit is contained in:
Jason Ekstrand 2020-07-14 13:27:53 -05:00 committed by Marge Bot
parent 0338db5e6b
commit c475e29be4
3 changed files with 17 additions and 4 deletions
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16
src/compiler/nir/nir_builder_opcodes_h.py
View File

@ -53,12 +53,17 @@ nir_${name}(nir_builder *build, ${src_decl_list(opcode.num_inputs)})
/* Generic builder for system values. */
static inline nir_ssa_def *
nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index,
unsigned bit_size)
unsigned num_components, unsigned bit_size)
{
nir_intrinsic_instr *load = nir_intrinsic_instr_create(build->shader, op);
if (nir_intrinsic_infos[op].dest_components > 0)
assert(num_components == nir_intrinsic_infos[op].dest_components);
else
load->num_components = num_components;
load->const_index[0] = index;
nir_ssa_dest_init(&load->instr, &load->dest,
nir_intrinsic_infos[op].dest_components, bit_size, NULL);
num_components, bit_size, NULL);
nir_builder_instr_insert(build, &load->instr);
return &load->dest.ssa;
}
@ -68,6 +73,8 @@ def sysval_decl_list(opcode):
res = ''
if opcode.indices:
res += ', unsigned ' + opcode.indices[0].lower()
if opcode.dest_components == 0:
res += ', unsigned num_components'
if len(opcode.bit_sizes) != 1:
res += ', unsigned bit_size'
return res
@ -79,6 +86,11 @@ def sysval_arg_list(opcode):
else:
args.append('0')
if opcode.dest_components == 0:
args.append('num_components')
else:
args.append(str(opcode.dest_components))
if len(opcode.bit_sizes) == 1:
bit_size = opcode.bit_sizes[0]
args.append(str(bit_size))

1
src/compiler/nir/nir_lower_system_values.c
View File

@ -305,6 +305,7 @@ lower_system_value_instr(nir_builder *b, nir_instr *instr, void *_state)
nir_intrinsic_op sysval_op =
nir_intrinsic_from_system_value(var->data.location);
return nir_load_system_value(b, sysval_op, 0,
intrin->dest.ssa.num_components,
intrin->dest.ssa.bit_size);
}

4
src/gallium/drivers/vc4/vc4_nir_lower_blend.c
View File

@ -100,7 +100,7 @@ vc4_blend_channel_f(nir_builder *b,
return nir_load_system_value(b,
nir_intrinsic_load_blend_const_color_r_float +
channel,
0, 32);
0, 1, 32);
case PIPE_BLENDFACTOR_CONST_ALPHA:
return nir_load_blend_const_color_a_float(b);
case PIPE_BLENDFACTOR_ZERO:
@ -118,7 +118,7 @@ vc4_blend_channel_f(nir_builder *b,
nir_load_system_value(b,
nir_intrinsic_load_blend_const_color_r_float +
channel,
0, 32));
0, 1, 32));
case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
return nir_fsub(b, nir_imm_float(b, 1.0),
nir_load_blend_const_color_a_float(b));