From c445cdf649da7fb9c6f463e4c24d2dc25bc5d2bf Mon Sep 17 00:00:00 2001 From: Boyuan Zhang Date: Wed, 8 Nov 2017 11:05:36 -0500 Subject: [PATCH] winsys/amdgpu: add vcn enc cs support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit New cs support is needed for vcn encode Signed-off-by: Boyuan Zhang Acked-by: Christian König --- src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index 9e10ead9999..2c6856b8cae 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c @@ -330,7 +330,8 @@ static bool amdgpu_cs_has_user_fence(struct amdgpu_cs_context *cs) { return cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_UVD && cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCE && - cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_DEC; + cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_DEC && + cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_ENC; } static bool amdgpu_cs_has_chaining(struct amdgpu_cs *cs) @@ -783,6 +784,10 @@ static bool amdgpu_init_cs_context(struct amdgpu_cs_context *cs, cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_VCN_DEC; break; + case RING_VCN_ENC: + cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_VCN_ENC; + break; + default: case RING_GFX: cs->ib[IB_MAIN].ip_type = AMDGPU_HW_IP_GFX;