aco: add emission support for register-allocated sdwa sels
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Reviewed-By: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
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@ -28,6 +28,18 @@ struct asm_context {
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int subvector_begin_pos = -1;
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};
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static uint32_t get_sdwa_sel(unsigned sel, PhysReg reg)
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{
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if (sel & sdwa_isra) {
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unsigned size = sdwa_rasize & sel;
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if (size == 1)
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return reg.byte();
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else /* size == 2 */
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return sdwa_isword | (reg.byte() >> 1);
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}
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return sel & sdwa_asuint;
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}
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void emit_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction* instr)
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{
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uint32_t instr_offset = out.size() * 4u;
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@ -578,20 +590,22 @@ void emit_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction*
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}
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encoding |= (sdwa->clamp ? 1 : 0) << 13;
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} else {
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encoding |= (uint32_t)(sdwa->dst_sel & sdwa_asuint) << 8;
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encoding |= get_sdwa_sel(sdwa->dst_sel, instr->definitions[0].physReg()) << 8;
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uint32_t dst_u = sdwa->dst_sel & sdwa_sext ? 1 : 0;
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if (sdwa->dst_preserve || (sdwa->dst_sel & sdwa_isra))
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dst_u = 2;
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encoding |= dst_u << 11;
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encoding |= (sdwa->clamp ? 1 : 0) << 13;
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encoding |= sdwa->omod << 14;
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}
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encoding |= (uint32_t)(sdwa->sel[0] & sdwa_asuint) << 16;
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encoding |= get_sdwa_sel(sdwa->sel[0], sdwa_op.physReg()) << 16;
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encoding |= sdwa->sel[0] & sdwa_sext ? 1 << 19 : 0;
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encoding |= sdwa->abs[0] << 21;
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encoding |= sdwa->neg[0] << 20;
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if (instr->operands.size() >= 2) {
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encoding |= (uint32_t)(sdwa->sel[1] & sdwa_asuint) << 24;
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encoding |= get_sdwa_sel(sdwa->sel[1], instr->operands[1].physReg()) << 24;
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encoding |= sdwa->sel[1] & sdwa_sext ? 1 << 27 : 0;
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encoding |= sdwa->abs[1] << 29;
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encoding |= sdwa->neg[1] << 28;
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@ -880,11 +880,13 @@ enum sdwa_sel : uint8_t {
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/* masks */
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sdwa_wordnum = 0x1,
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sdwa_bytenum = 0x3,
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sdwa_asuint = 0x7,
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sdwa_asuint = 0x7 | 0x10,
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sdwa_rasize = 0x3,
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/* flags */
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sdwa_isword = 0x4,
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sdwa_sext = 0x8,
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sdwa_isra = 0x10,
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/* specific values */
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sdwa_ubyte0 = 0,
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@ -902,6 +904,12 @@ enum sdwa_sel : uint8_t {
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sdwa_sword0 = sdwa_uword0 | sdwa_sext,
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sdwa_sword1 = sdwa_uword1 | sdwa_sext,
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sdwa_sdword = sdwa_udword | sdwa_sext,
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/* register-allocated */
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sdwa_ubyte = 1 | sdwa_isra,
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sdwa_uword = 2 | sdwa_isra,
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sdwa_sbyte = sdwa_ubyte | sdwa_sext,
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sdwa_sword = sdwa_uword | sdwa_sext,
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};
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/**
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@ -915,7 +923,7 @@ enum sdwa_sel : uint8_t {
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struct SDWA_instruction : public Instruction {
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/* these destination modifiers aren't available with VOPC except for
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* clamp on GFX8 */
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unsigned dst_sel:4;
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unsigned dst_sel:8;
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bool dst_preserve:1;
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bool clamp:1;
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unsigned omod:2; /* GFX9+ */
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