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nir: Offset vertex_id by first_vertex instead of base_vertex 

base_vertex will be zero for non-indexed calls and in that case we
need vertex_id to be offset by the ‘first’ parameter instead. That is
what we get with first_vertex. This is true for both GL and Vulkan.

The freedreno driver is also setting vertex_id_zero_based on
nir_options. In order to avoid breakage this patch switches the
relevant code to handle SYSTEM_VALUE_FIRST_VERTEX so that it can
retain the same behavior.

v2: change a3xx/fd3_emit.c and a4xx/fd4_emit.c from
SYSTEM_VALUE_BASE_VERTEX to SYSTEM_VALUE_FIRST_VERTEX (Kenneth).

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: Rob Clark <robdclark@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Neil Roberts 2018-01-25 19:15:43 +01:00 committed by Ian Romanick
parent c4f30a9100
commit c366f422f0
6 changed files with 6 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/compiler/nir/nir_lower_system_values.c
View File

@ -115,7 +115,7 @@ convert_block(nir_block *block, nir_builder *b)
if (b->shader->options->vertex_id_zero_based) {
sysval = nir_iadd(b,
nir_load_vertex_id_zero_base(b),
nir_load_base_vertex(b));
nir_load_first_vertex(b));
} else {
sysval = nir_load_vertex_id(b);
}

2
src/gallium/drivers/freedreno/a3xx/fd3_emit.c
View File

@ -374,7 +374,7 @@ fd3_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd3_emit *emit)
continue;
if (vp->inputs[i].sysval) {
switch(vp->inputs[i].slot) {
case SYSTEM_VALUE_BASE_VERTEX:
case SYSTEM_VALUE_FIRST_VERTEX:
/* handled elsewhere */
break;
case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:

2
src/gallium/drivers/freedreno/a4xx/fd4_emit.c
View File

@ -378,7 +378,7 @@ fd4_emit_vertex_bufs(struct fd_ringbuffer *ring, struct fd4_emit *emit)
continue;
if (vp->inputs[i].sysval) {
switch(vp->inputs[i].slot) {
case SYSTEM_VALUE_BASE_VERTEX:
case SYSTEM_VALUE_FIRST_VERTEX:
/* handled elsewhere */
break;
case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:

5
src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
View File

@ -2182,11 +2182,10 @@ emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
ctx->ir->outputs[n] = src[i];
}
break;
case nir_intrinsic_load_base_vertex:
case nir_intrinsic_load_first_vertex:
if (!ctx->basevertex) {
ctx->basevertex = create_driver_param(ctx, IR3_DP_VTXID_BASE);
add_sysval_input(ctx, SYSTEM_VALUE_BASE_VERTEX,
ctx->basevertex);
add_sysval_input(ctx, SYSTEM_VALUE_FIRST_VERTEX, ctx->basevertex);
}
dst[0] = ctx->basevertex;
break;

4
src/intel/vulkan/genX_cmd_buffer.c
View File

@ -2674,7 +2674,6 @@ void genX(CmdDraw)(
genX(cmd_buffer_flush_state)(cmd_buffer);
if (vs_prog_data->uses_firstvertex ||
vs_prog_data->uses_basevertex ||
vs_prog_data->uses_baseinstance)
emit_base_vertex_instance(cmd_buffer, firstVertex, firstInstance);
if (vs_prog_data->uses_drawid)
@ -2714,7 +2713,6 @@ void genX(CmdDrawIndexed)(
genX(cmd_buffer_flush_state)(cmd_buffer);
if (vs_prog_data->uses_firstvertex ||
vs_prog_data->uses_basevertex ||
vs_prog_data->uses_baseinstance)
emit_base_vertex_instance(cmd_buffer, vertexOffset, firstInstance);
if (vs_prog_data->uses_drawid)
@ -2855,7 +2853,6 @@ void genX(CmdDrawIndirect)(
uint32_t bo_offset = buffer->offset + offset;
if (vs_prog_data->uses_firstvertex ||
vs_prog_data->uses_basevertex ||
vs_prog_data->uses_baseinstance)
emit_base_vertex_instance_bo(cmd_buffer, bo, bo_offset + 8);
if (vs_prog_data->uses_drawid)
@ -2896,7 +2893,6 @@ void genX(CmdDrawIndexedIndirect)(
/* TODO: We need to stomp base vertex to 0 somehow */
if (vs_prog_data->uses_firstvertex ||
vs_prog_data->uses_basevertex ||
vs_prog_data->uses_baseinstance)
emit_base_vertex_instance_bo(cmd_buffer, bo, bo_offset + 12);
if (vs_prog_data->uses_drawid)

4
src/intel/vulkan/genX_pipeline.c
View File

@ -97,7 +97,6 @@ emit_vertex_input(struct anv_pipeline *pipeline,
const uint32_t elements_double = double_inputs_read >> VERT_ATTRIB_GENERIC0;
const bool needs_svgs_elem = vs_prog_data->uses_vertexid ||
vs_prog_data->uses_instanceid ||
vs_prog_data->uses_basevertex ||
vs_prog_data->uses_firstvertex ||
vs_prog_data->uses_baseinstance;
@ -178,8 +177,7 @@ emit_vertex_input(struct anv_pipeline *pipeline,
* This means, that if we have BaseInstance, we need BaseVertex as
* well. Just do all or nothing.
*/
uint32_t base_ctrl = (vs_prog_data->uses_basevertex ||
vs_prog_data->uses_firstvertex ||
uint32_t base_ctrl = (vs_prog_data->uses_firstvertex ||
vs_prog_data->uses_baseinstance) ?
VFCOMP_STORE_SRC : VFCOMP_STORE_0;