diff --git a/src/panfrost/vulkan/meson.build b/src/panfrost/vulkan/meson.build index 2707b68efeb..cea763e644f 100644 --- a/src/panfrost/vulkan/meson.build +++ b/src/panfrost/vulkan/meson.build @@ -28,7 +28,7 @@ panvk_entrypoints = custom_target( command : [ prog_python, '@INPUT0@', '--xml', '@INPUT1@', '--proto', '--weak', '--out-h', '@OUTPUT0@', '--out-c', '@OUTPUT1@', '--prefix', 'panvk', - '--device-prefix', 'panvk_v5', '--device-prefix', 'panvk_v6', '--device-prefix', 'panvk_v7', + '--device-prefix', 'panvk_v6', '--device-prefix', 'panvk_v7', ], depend_files : vk_entrypoints_gen_depend_files, ) @@ -55,7 +55,7 @@ panvk_deps = [] panvk_flags = [] panvk_per_arch_libs = [] -foreach arch : ['5', '6', '7'] +foreach arch : ['6', '7'] panvk_per_arch_libs += static_library( 'panvk_v@0@'.format(arch), [ diff --git a/src/panfrost/vulkan/panvk_device.c b/src/panfrost/vulkan/panvk_device.c index 1617b3a411c..6c489921b97 100644 --- a/src/panfrost/vulkan/panvk_device.c +++ b/src/panfrost/vulkan/panvk_device.c @@ -917,7 +917,6 @@ panvk_queue_init(struct panvk_device *device, } switch (pdev->arch) { - case 5: queue->vk.driver_submit = panvk_v5_queue_submit; break; case 6: queue->vk.driver_submit = panvk_v6_queue_submit; break; case 7: queue->vk.driver_submit = panvk_v7_queue_submit; break; default: unreachable("Invalid arch"); @@ -971,9 +970,6 @@ panvk_CreateDevice(VkPhysicalDevice physicalDevice, struct vk_device_dispatch_table dispatch_table; switch (physical_device->pdev.arch) { - case 5: - dev_entrypoints = &panvk_v5_device_entrypoints; - break; case 6: dev_entrypoints = &panvk_v6_device_entrypoints; break; diff --git a/src/panfrost/vulkan/panvk_private.h b/src/panfrost/vulkan/panvk_private.h index 7466b78b201..5d72b7ec532 100644 --- a/src/panfrost/vulkan/panvk_private.h +++ b/src/panfrost/vulkan/panvk_private.h @@ -1122,7 +1122,6 @@ VK_DEFINE_NONDISP_HANDLE_CASTS(panvk_sampler, base, VkSampler, VK_OBJECT_TYPE_SA #define panvk_arch_dispatch(arch, name, ...) \ do { \ switch (arch) { \ - case 5: panvk_arch_name(name, v5)(__VA_ARGS__); break; \ case 6: panvk_arch_name(name, v6)(__VA_ARGS__); break; \ case 7: panvk_arch_name(name, v7)(__VA_ARGS__); break; \ default: unreachable("Invalid arch"); \ @@ -1130,9 +1129,7 @@ do { \ } while (0) #ifdef PAN_ARCH -#if PAN_ARCH == 5 -#define panvk_per_arch(name) panvk_arch_name(name, v5) -#elif PAN_ARCH == 6 +#if PAN_ARCH == 6 #define panvk_per_arch(name) panvk_arch_name(name, v6) #elif PAN_ARCH == 7 #define panvk_per_arch(name) panvk_arch_name(name, v7) @@ -1142,14 +1139,6 @@ do { \ #include "panvk_vX_device.h" #include "panvk_vX_meta.h" #else -#define PAN_ARCH 5 -#define panvk_per_arch(name) panvk_arch_name(name, v5) -#include "panvk_vX_cmd_buffer.h" -#include "panvk_vX_cs.h" -#include "panvk_vX_device.h" -#include "panvk_vX_meta.h" -#undef PAN_ARCH -#undef panvk_per_arch #define PAN_ARCH 6 #define panvk_per_arch(name) panvk_arch_name(name, v6) #include "panvk_vX_cmd_buffer.h" diff --git a/src/panfrost/vulkan/panvk_vX_cmd_buffer.c b/src/panfrost/vulkan/panvk_vX_cmd_buffer.c index a2af0700ae8..a4c2d4e75c7 100644 --- a/src/panfrost/vulkan/panvk_vX_cmd_buffer.c +++ b/src/panfrost/vulkan/panvk_vX_cmd_buffer.c @@ -65,63 +65,6 @@ panvk_cmd_prepare_fragment_job(struct panvk_cmd_buffer *cmdbuf) util_dynarray_append(&batch->jobs, void *, job_ptr.cpu); } -#if PAN_ARCH == 5 -void -panvk_per_arch(cmd_get_polygon_list)(struct panvk_cmd_buffer *cmdbuf, - unsigned width, unsigned height, - bool has_draws) -{ - struct panfrost_device *pdev = &cmdbuf->device->physical_device->pdev; - struct panvk_batch *batch = cmdbuf->state.batch; - - if (batch->tiler.ctx.midgard.polygon_list) - return; - - unsigned size = - panfrost_tiler_get_polygon_list_size(pdev, width, height, has_draws); - size = util_next_power_of_two(size); - - /* Create the BO as invisible if we can. In the non-hierarchical tiler case, - * we need to write the polygon list manually because there's not WRITE_VALUE - * job in the chain. */ - bool init_polygon_list = !has_draws && pdev->model->quirks.no_hierarchical_tiling; - batch->tiler.ctx.midgard.polygon_list = - panfrost_bo_create(pdev, size, - panvk_debug_adjust_bo_flags(cmdbuf->device, - init_polygon_list ? - PAN_BO_INVISIBLE: 0), - "Polygon list"); - - - if (init_polygon_list) { - assert(batch->tiler.ctx.midgard.polygon_list->ptr.cpu); - uint32_t *polygon_list_body = - batch->tiler.ctx.midgard.polygon_list->ptr.cpu + - MALI_MIDGARD_TILER_MINIMUM_HEADER_SIZE; - polygon_list_body[0] = 0xa0000000; - } - - batch->tiler.ctx.midgard.disable = !has_draws; -} -#endif - -#if PAN_ARCH <= 5 -static void -panvk_copy_fb_desc(struct panvk_cmd_buffer *cmdbuf, void *src) -{ - const struct pan_fb_info *fbinfo = &cmdbuf->state.fb.info; - struct panvk_batch *batch = cmdbuf->state.batch; - uint32_t size = pan_size(FRAMEBUFFER); - - if (fbinfo->zs.view.zs || fbinfo->zs.view.s) - size += pan_size(ZS_CRC_EXTENSION); - - size += MAX2(fbinfo->rt_count, 1) * pan_size(RENDER_TARGET); - - memcpy(batch->fb.desc.cpu, src, size); -} -#endif - void panvk_per_arch(cmd_close_batch)(struct panvk_cmd_buffer *cmdbuf) { @@ -131,11 +74,6 @@ panvk_per_arch(cmd_close_batch)(struct panvk_cmd_buffer *cmdbuf) return; const struct pan_fb_info *fbinfo = &cmdbuf->state.fb.info; -#if PAN_ARCH <= 5 - uint32_t tmp_fbd[(pan_size(FRAMEBUFFER) + - pan_size(ZS_CRC_EXTENSION) + - (MAX_RTS * pan_size(RENDER_TARGET))) / 4]; -#endif assert(batch); @@ -171,10 +109,8 @@ panvk_per_arch(cmd_close_batch)(struct panvk_cmd_buffer *cmdbuf) struct panfrost_ptr preload_jobs[2]; unsigned num_preload_jobs = GENX(pan_preload_fb)(&cmdbuf->desc_pool.base, &batch->scoreboard, - &cmdbuf->state.fb.info, - PAN_ARCH >= 6 ? batch->tls.gpu : batch->fb.desc.gpu, - PAN_ARCH >= 6 ? batch->tiler.descs.gpu : 0, - preload_jobs); + &cmdbuf->state.fb.info, batch->tls.gpu, + batch->tiler.descs.gpu, preload_jobs); for (unsigned i = 0; i < num_preload_jobs; i++) util_dynarray_append(&batch->jobs, void *, preload_jobs[i].cpu); } @@ -193,42 +129,13 @@ panvk_per_arch(cmd_close_batch)(struct panvk_cmd_buffer *cmdbuf) pan_pool_alloc_aligned(&cmdbuf->tls_pool.base, batch->wls_total_size, 4096).gpu; } - if ((PAN_ARCH >= 6 || !batch->fb.desc.cpu) && batch->tls.cpu) + if (batch->tls.cpu) GENX(pan_emit_tls)(&batch->tlsinfo, batch->tls.cpu); if (batch->fb.desc.cpu) { -#if PAN_ARCH == 5 - panvk_per_arch(cmd_get_polygon_list)(cmdbuf, - fbinfo->width, - fbinfo->height, - false); - - mali_ptr polygon_list = - batch->tiler.ctx.midgard.polygon_list->ptr.gpu; - struct panfrost_ptr writeval_job = - panfrost_scoreboard_initialize_tiler(&cmdbuf->desc_pool.base, - &batch->scoreboard, - polygon_list); - if (writeval_job.cpu) - util_dynarray_append(&batch->jobs, void *, writeval_job.cpu); -#endif - -#if PAN_ARCH <= 5 - void *fbd = tmp_fbd; -#else - void *fbd = batch->fb.desc.cpu; -#endif - batch->fb.desc.gpu |= GENX(pan_emit_fbd)(pdev, &cmdbuf->state.fb.info, &batch->tlsinfo, - &batch->tiler.ctx, fbd); - -#if PAN_ARCH <= 5 - panvk_copy_fb_desc(cmdbuf, tmp_fbd); - memcpy(batch->tiler.templ, - pan_section_ptr(fbd, FRAMEBUFFER, TILER), - pan_size(TILER_CONTEXT)); -#endif + &batch->tiler.ctx, batch->fb.desc.cpu); panvk_cmd_prepare_fragment_job(cmdbuf); } @@ -286,10 +193,8 @@ panvk_per_arch(cmd_alloc_fb_desc)(struct panvk_cmd_buffer *cmdbuf) /* Tag the pointer */ batch->fb.desc.gpu |= tags; -#if PAN_ARCH >= 6 memset(&cmdbuf->state.fb.info.bifrost.pre_post.dcds, 0, sizeof(cmdbuf->state.fb.info.bifrost.pre_post.dcds)); -#endif } void @@ -298,14 +203,7 @@ panvk_per_arch(cmd_alloc_tls_desc)(struct panvk_cmd_buffer *cmdbuf, bool gfx) struct panvk_batch *batch = cmdbuf->state.batch; assert(batch); - if (batch->tls.gpu) - return; - - if (PAN_ARCH == 5 && gfx) { - panvk_per_arch(cmd_alloc_fb_desc)(cmdbuf); - batch->tls = batch->fb.desc; - batch->tls.gpu &= ~63ULL; - } else { + if (!batch->tls.gpu) { batch->tls = pan_pool_alloc_desc(&cmdbuf->desc_pool.base, LOCAL_STORAGE); } @@ -413,13 +311,10 @@ panvk_cmd_prepare_textures(struct panvk_cmd_buffer *cmdbuf, if (!num_textures || desc_state->textures) return; - unsigned tex_entry_size = PAN_ARCH >= 6 ? - pan_size(TEXTURE) : - sizeof(mali_ptr); struct panfrost_ptr textures = pan_pool_alloc_aligned(&cmdbuf->desc_pool.base, - num_textures * tex_entry_size, - tex_entry_size); + num_textures * pan_size(TEXTURE), + pan_size(TEXTURE)); void *texture = textures.cpu; @@ -429,10 +324,10 @@ panvk_cmd_prepare_textures(struct panvk_cmd_buffer *cmdbuf, memcpy(texture, desc_state->sets[i]->textures, desc_state->sets[i]->layout->num_textures * - tex_entry_size); + pan_size(TEXTURE)); texture += desc_state->sets[i]->layout->num_textures * - tex_entry_size; + pan_size(TEXTURE); } desc_state->textures = textures.gpu; @@ -458,9 +353,7 @@ panvk_cmd_prepare_samplers(struct panvk_cmd_buffer *cmdbuf, /* Prepare the dummy sampler */ pan_pack(sampler, SAMPLER, cfg) { -#if PAN_ARCH >= 6 cfg.seamless_cube_map = false; -#endif cfg.magnify_nearest = true; cfg.minify_nearest = true; cfg.normalized_coordinates = false; @@ -535,7 +428,6 @@ panvk_draw_prepare_fs_rsd(struct panvk_cmd_buffer *cmdbuf, draw->fs_rsd = cmdbuf->state.fs_rsd; } -#if PAN_ARCH >= 6 void panvk_per_arch(cmd_get_tiler_context)(struct panvk_cmd_buffer *cmdbuf, unsigned width, unsigned height) @@ -562,23 +454,15 @@ panvk_per_arch(cmd_get_tiler_context)(struct panvk_cmd_buffer *cmdbuf, pan_size(TILER_CONTEXT) + pan_size(TILER_HEAP)); batch->tiler.ctx.bifrost = batch->tiler.descs.gpu; } -#endif void panvk_per_arch(cmd_prepare_tiler_context)(struct panvk_cmd_buffer *cmdbuf) { const struct pan_fb_info *fbinfo = &cmdbuf->state.fb.info; -#if PAN_ARCH == 5 - panvk_per_arch(cmd_get_polygon_list)(cmdbuf, - fbinfo->width, - fbinfo->height, - true); -#else panvk_per_arch(cmd_get_tiler_context)(cmdbuf, fbinfo->width, fbinfo->height); -#endif } static void @@ -604,16 +488,14 @@ panvk_draw_prepare_varyings(struct panvk_cmd_buffer *cmdbuf, unsigned buf_count = panvk_varyings_buf_count(varyings); struct panfrost_ptr bufs = pan_pool_alloc_desc_array(&cmdbuf->desc_pool.base, - buf_count + (PAN_ARCH >= 6 ? 1 : 0), + buf_count + 1, ATTRIBUTE_BUFFER); panvk_per_arch(emit_varying_bufs)(varyings, bufs.cpu); /* We need an empty entry to stop prefetching on Bifrost */ -#if PAN_ARCH >= 6 memset(bufs.cpu + (pan_size(ATTRIBUTE_BUFFER) * buf_count), 0, pan_size(ATTRIBUTE_BUFFER)); -#endif if (BITSET_TEST(varyings->active, VARYING_SLOT_POS)) { draw->position = varyings->buf[varyings->varying[VARYING_SLOT_POS].buf].address + @@ -672,7 +554,6 @@ panvk_fill_non_vs_attribs(struct panvk_cmd_buffer *cmdbuf, pan_pack(attribs + offset, ATTRIBUTE, cfg) { cfg.buffer_index = first_buf + (img_idx + i) * 2; cfg.format = desc_state->sets[s]->img_fmts[i]; - cfg.offset_enable = PAN_ARCH <= 5; } offset += pan_size(ATTRIBUTE); } @@ -693,7 +574,7 @@ panvk_prepare_non_vs_attribs(struct panvk_cmd_buffer *cmdbuf, unsigned attrib_buf_count = (pipeline->layout->num_imgs * 2); struct panfrost_ptr bufs = pan_pool_alloc_desc_array(&cmdbuf->desc_pool.base, - attrib_buf_count + (PAN_ARCH >= 6 ? 1 : 0), + attrib_buf_count + 1, ATTRIBUTE_BUFFER); struct panfrost_ptr attribs = pan_pool_alloc_desc_array(&cmdbuf->desc_pool.base, attrib_count, @@ -731,7 +612,7 @@ panvk_draw_prepare_vs_attribs(struct panvk_cmd_buffer *cmdbuf, unsigned attrib_buf_count = pipeline->attribs.buf_count * 2; struct panfrost_ptr bufs = pan_pool_alloc_desc_array(&cmdbuf->desc_pool.base, - attrib_buf_count + (PAN_ARCH >= 6 ? 1 : 0), + attrib_buf_count + 1, ATTRIBUTE_BUFFER); struct panfrost_ptr attribs = pan_pool_alloc_desc_array(&cmdbuf->desc_pool.base, attrib_count, @@ -755,10 +636,8 @@ panvk_draw_prepare_vs_attribs(struct panvk_cmd_buffer *cmdbuf, } /* A NULL entry is needed to stop prefecting on Bifrost */ -#if PAN_ARCH >= 6 memset(bufs.cpu + (pan_size(ATTRIBUTE_BUFFER) * attrib_buf_count), 0, pan_size(ATTRIBUTE_BUFFER)); -#endif desc_state->vs_attrib_bufs = bufs.gpu; desc_state->vs_attribs = attribs.gpu; @@ -1199,10 +1078,6 @@ panvk_reset_cmdbuf(struct panvk_cmd_buffer *cmdbuf) list_for_each_entry_safe(struct panvk_batch, batch, &cmdbuf->batches, node) { list_del(&batch->node); util_dynarray_fini(&batch->jobs); -#if PAN_ARCH <= 5 - panfrost_bo_unreference(batch->tiler.ctx.midgard.polygon_list); -#endif - util_dynarray_fini(&batch->event_ops); vk_free(&cmdbuf->pool->vk.alloc, batch); @@ -1229,10 +1104,6 @@ panvk_destroy_cmdbuf(struct panvk_cmd_buffer *cmdbuf) list_for_each_entry_safe(struct panvk_batch, batch, &cmdbuf->batches, node) { list_del(&batch->node); util_dynarray_fini(&batch->jobs); -#if PAN_ARCH <= 5 - panfrost_bo_unreference(batch->tiler.ctx.midgard.polygon_list); -#endif - util_dynarray_fini(&batch->event_ops); vk_free(&cmdbuf->pool->vk.alloc, batch); diff --git a/src/panfrost/vulkan/panvk_vX_cmd_buffer.h b/src/panfrost/vulkan/panvk_vX_cmd_buffer.h index fbe5b916f39..7d8275c78d4 100644 --- a/src/panfrost/vulkan/panvk_vX_cmd_buffer.h +++ b/src/panfrost/vulkan/panvk_vX_cmd_buffer.h @@ -36,16 +36,9 @@ void panvk_per_arch(cmd_close_batch)(struct panvk_cmd_buffer *cmdbuf); -#if PAN_ARCH <= 5 -void -panvk_per_arch(cmd_get_polygon_list)(struct panvk_cmd_buffer *cmdbuf, - unsigned width, unsigned height, - bool has_draws); -#else void panvk_per_arch(cmd_get_tiler_context)(struct panvk_cmd_buffer *cmdbuf, unsigned width, unsigned height); -#endif void panvk_per_arch(cmd_alloc_fb_desc)(struct panvk_cmd_buffer *cmdbuf); diff --git a/src/panfrost/vulkan/panvk_vX_cs.c b/src/panfrost/vulkan/panvk_vX_cs.c index 453661da93a..be4785a652a 100644 --- a/src/panfrost/vulkan/panvk_vX_cs.c +++ b/src/panfrost/vulkan/panvk_vX_cs.c @@ -104,7 +104,6 @@ panvk_varying_hw_format(const struct panvk_device *dev, { const struct panfrost_device *pdev = &dev->physical_device->pdev; gl_varying_slot loc = varyings->stage[stage].loc[idx]; - bool fs = stage == MESA_SHADER_FRAGMENT; switch (loc) { case VARYING_SLOT_PNTC: @@ -116,14 +115,11 @@ panvk_varying_hw_format(const struct panvk_device *dev, #endif case VARYING_SLOT_POS: #if PAN_ARCH <= 6 - return ((fs ? MALI_RGBA32F : MALI_SNAP_4) << 12) | - panfrost_get_default_swizzle(4); + return (MALI_SNAP_4 << 12) | panfrost_get_default_swizzle(4); #else - return ((fs ? MALI_RGBA32F : MALI_SNAP_4) << 12) | - MALI_RGB_COMPONENT_ORDER_RGBA; + return (MALI_SNAP_4 << 12) | MALI_RGB_COMPONENT_ORDER_RGBA; #endif default: - assert(!panvk_varying_is_builtin(stage, loc)); if (varyings->varying[loc].format != PIPE_FORMAT_NONE) return pdev->formats[varyings->varying[loc].format].hw; #if PAN_ARCH >= 7 @@ -141,18 +137,10 @@ panvk_emit_varying(const struct panvk_device *dev, void *attrib) { gl_varying_slot loc = varyings->stage[stage].loc[idx]; - bool fs = stage == MESA_SHADER_FRAGMENT; pan_pack(attrib, ATTRIBUTE, cfg) { - if (!panvk_varying_is_builtin(stage, loc)) { - cfg.buffer_index = varyings->varying[loc].buf; - cfg.offset = varyings->varying[loc].offset; - } else { - cfg.buffer_index = - panvk_varying_buf_index(varyings, - panvk_varying_buf_id(fs, loc)); - } - cfg.offset_enable = PAN_ARCH == 5; + cfg.buffer_index = varyings->varying[loc].buf; + cfg.offset = varyings->varying[loc].offset; cfg.format = panvk_varying_hw_format(dev, varyings, stage, idx); } } @@ -176,14 +164,6 @@ panvk_emit_varying_buf(const struct panvk_varyings_info *varyings, unsigned buf_idx = panvk_varying_buf_index(varyings, id); pan_pack(buf, ATTRIBUTE_BUFFER, cfg) { -#if PAN_ARCH == 5 - enum mali_attribute_special special_id = panvk_varying_special_buf_id(id); - if (special_id) { - cfg.type = 0; - cfg.special = special_id; - continue; - } -#endif unsigned offset = varyings->buf[buf_idx].address & 63; cfg.stride = varyings->buf[buf_idx].stride; @@ -213,23 +193,6 @@ panvk_emit_attrib_buf(const struct panvk_attribs_info *info, { const struct panvk_attrib_buf_info *buf_info = &info->buf[idx]; -#if PAN_ARCH == 5 - if (buf_info->special) { - switch (buf_info->special_id) { - case PAN_VERTEX_ID: - panfrost_vertex_id(draw->padded_vertex_count, desc, - draw->instance_count > 1); - return; - case PAN_INSTANCE_ID: - panfrost_instance_id(draw->padded_vertex_count, desc, - draw->instance_count > 1); - return; - default: - unreachable("Invalid attribute ID"); - } - } -#endif - assert(idx < buf_count); const struct panvk_attrib_buf *buf = &bufs[idx]; mali_ptr addr = buf->address & ~63ULL; @@ -564,11 +527,7 @@ panvk_emit_tiler_dcd(const struct panvk_pipeline *pipeline, cfg.viewport = draw->viewport; cfg.varyings = draw->stages[MESA_SHADER_FRAGMENT].varyings; cfg.varying_buffers = cfg.varyings ? draw->varying_bufs : 0; -#if PAN_ARCH == 5 - cfg.fbd = draw->fb; -#else cfg.thread_storage = draw->tls; -#endif /* For all primitives but lines DRAW.flat_shading_vertex must * be set to 0 and the provoking vertex is selected with the @@ -577,12 +536,7 @@ panvk_emit_tiler_dcd(const struct panvk_pipeline *pipeline, if (pipeline->ia.topology == MALI_DRAW_MODE_LINES || pipeline->ia.topology == MALI_DRAW_MODE_LINE_STRIP || pipeline->ia.topology == MALI_DRAW_MODE_LINE_LOOP) { - /* The logic is inverted on bifrost. */ -#if PAN_ARCH == 5 - cfg.flat_shading_vertex = false; -#else cfg.flat_shading_vertex = true; -#endif } cfg.offset_start = draw->offset_start; @@ -616,12 +570,10 @@ panvk_per_arch(emit_tiler_job)(const struct panvk_pipeline *pipeline, section = pan_section_ptr(job, TILER_JOB, DRAW); panvk_emit_tiler_dcd(pipeline, draw, section); -#if PAN_ARCH >= 6 pan_section_pack(job, TILER_JOB, TILER, cfg) { cfg.address = draw->tiler_ctx->bifrost; } pan_section_pack(job, TILER_JOB, PADDING, padding); -#endif } void @@ -661,7 +613,6 @@ panvk_per_arch(emit_viewport)(const VkViewport *viewport, } } -#if PAN_ARCH >= 6 static enum mali_register_file_format bifrost_blend_type_from_nir(nir_alu_type nir_type) { @@ -684,7 +635,6 @@ bifrost_blend_type_from_nir(nir_alu_type nir_type) unreachable("Unsupported blend shader type for NIR alu type"); } } -#endif void panvk_per_arch(emit_blend)(const struct panvk_device *dev, @@ -698,9 +648,7 @@ panvk_per_arch(emit_blend)(const struct panvk_device *dev, pan_pack(bd, BLEND, cfg) { if (!blend->rt_count || !rts->equation.color_mask) { cfg.enable = false; -#if PAN_ARCH >= 6 cfg.internal.mode = MALI_BLEND_MODE_OFF; -#endif continue; } @@ -708,14 +656,6 @@ panvk_per_arch(emit_blend)(const struct panvk_device *dev, cfg.load_destination = pan_blend_reads_dest(blend->rts[rt].equation); cfg.round_to_fb_precision = !dithered; -#if PAN_ARCH <= 5 - cfg.blend_shader = false; - pan_blend_to_fixed_function_equation(blend->rts[rt].equation, - &cfg.equation); - cfg.constant = - pan_blend_get_constant(pan_blend_constant_mask(blend->rts[rt].equation), - blend->constants); -#else const struct panfrost_device *pdev = &dev->physical_device->pdev; const struct util_format_description *format_desc = util_format_description(rts->format); @@ -754,7 +694,6 @@ panvk_per_arch(emit_blend)(const struct panvk_device *dev, cfg.internal.fixed_function.conversion.register_format = bifrost_blend_type_from_nir(pipeline->fs.info.bifrost.blend[rt].type); cfg.internal.fixed_function.rt = rt; -#endif } } @@ -768,11 +707,7 @@ panvk_per_arch(emit_blend_constant)(const struct panvk_device *dev, pan_pack(bd, BLEND, cfg) { cfg.enable = false; -#if PAN_ARCH == 5 - cfg.constant = constant; -#else cfg.constant = constant * pipeline->blend.constant[rt].bifrost_factor; -#endif } } @@ -816,28 +751,6 @@ panvk_per_arch(emit_base_fs_rsd)(const struct panvk_device *dev, if (pipeline->fs.required) { pan_shader_prepare_rsd(info, pipeline->fs.address, &cfg); -#if PAN_ARCH == 5 - /* If either depth or stencil is enabled, discard matters */ - bool zs_enabled = - (pipeline->zs.z_test && pipeline->zs.z_compare_func != MALI_FUNC_ALWAYS) || - pipeline->zs.s_test; - - cfg.properties.work_register_count = info->work_reg_count; - cfg.properties.force_early_z = - info->fs.can_early_z && !pipeline->ms.alpha_to_coverage && - pipeline->zs.z_compare_func == MALI_FUNC_ALWAYS; - - - /* Workaround a hardware errata where early-z cannot be enabled - * when discarding even when the depth buffer is read-only, by - * lying to the hardware about the discard and setting the - * reads tilebuffer? flag to compensate */ - cfg.properties.shader_reads_tilebuffer = - info->fs.outputs_read || - (!zs_enabled && info->fs.can_discard); - cfg.properties.shader_contains_discard = - zs_enabled && info->fs.can_discard; -#else uint8_t rt_written = pipeline->fs.info.outputs_written >> FRAG_RESULT_DATA0; uint8_t rt_mask = pipeline->fs.rt_mask; cfg.properties.allow_forward_pixel_to_kill = @@ -845,19 +758,11 @@ panvk_per_arch(emit_base_fs_rsd)(const struct panvk_device *dev, !(rt_mask & ~rt_written) && !pipeline->ms.alpha_to_coverage && !pipeline->blend.reads_dest; -#endif } else { cfg.properties.depth_source = MALI_DEPTH_SOURCE_FIXED_FUNCTION; - -#if PAN_ARCH == 5 - cfg.shader.shader = 0x1; - cfg.properties.work_register_count = 1; - cfg.properties.force_early_z = true; -#else cfg.properties.allow_forward_pixel_to_kill = true; cfg.properties.allow_forward_pixel_to_be_killed = true; cfg.properties.zs_update_operation = MALI_PIXEL_KILL_STRONG_EARLY; -#endif } bool msaa = pipeline->ms.rast_samples > 1; @@ -930,9 +835,6 @@ panvk_per_arch(emit_tiler_context)(const struct panvk_device *dev, unsigned width, unsigned height, const struct panfrost_ptr *descs) { -#if PAN_ARCH == 5 - unreachable("Not supported on v5"); -#else const struct panfrost_device *pdev = &dev->physical_device->pdev; pan_pack(descs->cpu + pan_size(TILER_CONTEXT), TILER_HEAP, cfg) { @@ -948,5 +850,4 @@ panvk_per_arch(emit_tiler_context)(const struct panvk_device *dev, cfg.fb_height = height; cfg.heap = descs->gpu + pan_size(TILER_CONTEXT); } -#endif } diff --git a/src/panfrost/vulkan/panvk_vX_descriptor_set.c b/src/panfrost/vulkan/panvk_vX_descriptor_set.c index 1a87a19231d..0dd2767467d 100644 --- a/src/panfrost/vulkan/panvk_vX_descriptor_set.c +++ b/src/panfrost/vulkan/panvk_vX_descriptor_set.c @@ -285,9 +285,7 @@ panvk_per_arch(descriptor_set_create)(struct panvk_device *device, if (layout->num_textures) { set->textures = - vk_zalloc(&device->vk.alloc, - (PAN_ARCH >= 6 ? pan_size(TEXTURE) : sizeof(mali_ptr)) * - layout->num_textures, + vk_zalloc(&device->vk.alloc, pan_size(TEXTURE) * layout->num_textures, 8, VK_OBJECT_TYPE_DESCRIPTOR_SET); if (!set->textures) goto err_free_set; @@ -449,11 +447,7 @@ panvk_copy_sampler_desc(struct panvk_descriptor_set *dst_set, sizeof(struct mali_sampler_packed)); } -#if PAN_ARCH >= 6 static struct mali_texture_packed * -#else -static mali_ptr * -#endif panvk_tex_desc(struct panvk_descriptor_set *set, uint32_t binding, uint32_t elem) { @@ -462,11 +456,7 @@ panvk_tex_desc(struct panvk_descriptor_set *set, unsigned tex_idx = binding_layout->tex_idx + elem; -#if PAN_ARCH >= 6 return &((struct mali_texture_packed *)set->textures)[tex_idx]; -#else - return &((mali_ptr *)set->textures)[tex_idx]; -#endif } static void @@ -477,12 +467,8 @@ panvk_write_tex_desc(UNUSED struct panvk_device *dev, { VK_FROM_HANDLE(panvk_image_view, view, pImageInfo->imageView); -#if PAN_ARCH >= 6 memcpy(panvk_tex_desc(set, binding, elem), view->descs.tex, pan_size(TEXTURE)); -#else - *panvk_tex_desc(set, binding, elem) = view->bo->ptr.gpu; -#endif panvk_fill_image_desc(panvk_desc_ubo_data(set, binding, elem), view); } @@ -507,12 +493,8 @@ panvk_write_tex_buf_desc(UNUSED struct panvk_device *dev, { VK_FROM_HANDLE(panvk_buffer_view, view, bufferView); -#if PAN_ARCH >= 6 memcpy(panvk_tex_desc(set, binding, elem), view->descs.tex, pan_size(TEXTURE)); -#else - *panvk_tex_desc(set, binding, elem) = view->bo->ptr.gpu; -#endif panvk_fill_bview_desc(panvk_desc_ubo_data(set, binding, elem), view); } diff --git a/src/panfrost/vulkan/panvk_vX_device.c b/src/panfrost/vulkan/panvk_vX_device.c index 7352afc0237..0edf1cba898 100644 --- a/src/panfrost/vulkan/panvk_vX_device.c +++ b/src/panfrost/vulkan/panvk_vX_device.c @@ -53,19 +53,10 @@ panvk_queue_submit_batch(struct panvk_queue *queue, memset((*job), 0, 4 * 4); /* Reset the tiler before re-issuing the batch */ -#if PAN_ARCH >= 6 if (batch->tiler.descs.cpu) { memcpy(batch->tiler.descs.cpu, batch->tiler.templ, pan_size(TILER_CONTEXT) + pan_size(TILER_HEAP)); } -#else - if (batch->fb.desc.cpu) { - void *tiler = pan_section_ptr(batch->fb.desc.cpu, FRAMEBUFFER, TILER); - memcpy(tiler, batch->tiler.templ, pan_size(TILER_CONTEXT)); - /* All weights set to 0, nothing to do here */ - pan_section_pack(batch->fb.desc.cpu, FRAMEBUFFER, TILER_WEIGHTS, w); - } -#endif } if (batch->scoreboard.first_job) { diff --git a/src/panfrost/vulkan/panvk_vX_image.c b/src/panfrost/vulkan/panvk_vX_image.c index a6457e48460..854f2d580b1 100644 --- a/src/panfrost/vulkan/panvk_vX_image.c +++ b/src/panfrost/vulkan/panvk_vX_image.c @@ -124,19 +124,10 @@ panvk_per_arch(CreateImageView)(VkDevice _device, GENX(panfrost_estimate_texture_payload_size)(&view->pview) + pan_size(TEXTURE); - unsigned surf_descs_offset = PAN_ARCH <= 5 ? pan_size(TEXTURE) : 0; - view->bo = panfrost_bo_create(pdev, bo_size, 0, "Texture descriptor"); - struct panfrost_ptr surf_descs = { - .cpu = view->bo->ptr.cpu + surf_descs_offset, - .gpu = view->bo->ptr.gpu + surf_descs_offset, - }; - void *tex_desc = PAN_ARCH >= 6 ? - &view->descs.tex : view->bo->ptr.cpu; - STATIC_ASSERT(sizeof(view->descs.tex) >= pan_size(TEXTURE)); - GENX(panfrost_new_texture)(pdev, &view->pview, tex_desc, &surf_descs); + GENX(panfrost_new_texture)(pdev, &view->pview, &view->descs.tex, &view->bo->ptr); } if (view->vk.usage & VK_IMAGE_USAGE_STORAGE_BIT) { @@ -206,23 +197,14 @@ panvk_per_arch(CreateBufferView)(VkDevice _device, assert(!(address & 63)); if (buffer->vk.usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT) { - unsigned bo_size = - PAN_ARCH <= 5 ? (pan_size(SURFACE) + pan_size(TEXTURE)) : - pan_size(SURFACE_WITH_STRIDE); + unsigned bo_size = pan_size(SURFACE_WITH_STRIDE); view->bo = panfrost_bo_create(pdev, bo_size, 0, "Texture descriptor"); - void *surf = view->bo->ptr.cpu + (PAN_ARCH <= 5 ? pan_size(TEXTURE) : 0); - void *tex = PAN_ARCH <= 5 ? view->bo->ptr.cpu : &view->descs.tex; - -#if PAN_ARCH <= 5 - pan_pack(surf, SURFACE, cfg) { -#else - pan_pack(surf, SURFACE_WITH_STRIDE, cfg) { -#endif + pan_pack(&view->bo->ptr.cpu, SURFACE_WITH_STRIDE, cfg) { cfg.pointer = address; } - pan_pack(tex, TEXTURE, cfg) { + pan_pack(&view->descs.tex, TEXTURE, cfg) { cfg.dimension = MALI_TEXTURE_DIMENSION_1D; cfg.format = pdev->formats[view->fmt].hw; cfg.width = view->elems; @@ -231,12 +213,8 @@ panvk_per_arch(CreateBufferView)(VkDevice _device, cfg.texel_ordering = MALI_TEXTURE_LAYOUT_LINEAR; cfg.levels = 1; cfg.array_size = 1; -#if PAN_ARCH >= 6 cfg.surfaces = view->bo->ptr.gpu; cfg.maximum_lod = cfg.minimum_lod = FIXED_16(0, false); -#else - cfg.manual_stride = false; -#endif } } diff --git a/src/panfrost/vulkan/panvk_vX_meta_blit.c b/src/panfrost/vulkan/panvk_vX_meta_blit.c index 11e7c6271d5..ca293a5ca83 100644 --- a/src/panfrost/vulkan/panvk_vX_meta_blit.c +++ b/src/panfrost/vulkan/panvk_vX_meta_blit.c @@ -118,13 +118,8 @@ panvk_meta_blit(struct panvk_cmd_buffer *cmdbuf, panvk_per_arch(cmd_alloc_fb_desc)(cmdbuf); panvk_per_arch(cmd_prepare_tiler_context)(cmdbuf); -#if PAN_ARCH >= 6 tsd = batch->tls.gpu; tiler = batch->tiler.descs.gpu; -#else - tsd = batch->fb.desc.gpu; - tiler = 0; -#endif struct panfrost_ptr job = GENX(pan_blit)(&ctx, &cmdbuf->desc_pool.base, &batch->scoreboard, tsd, tiler); diff --git a/src/panfrost/vulkan/panvk_vX_meta_clear.c b/src/panfrost/vulkan/panvk_vX_meta_clear.c index eedd8222fce..63afc2a1882 100644 --- a/src/panfrost/vulkan/panvk_vX_meta_clear.c +++ b/src/panfrost/vulkan/panvk_vX_meta_clear.c @@ -67,8 +67,7 @@ panvk_meta_clear_color_attachment_shader(struct panfrost_device *pdev, shader_info->push.count = 4; mali_ptr shader = - pan_pool_upload_aligned(bin_pool, binary.data, binary.size, - PAN_ARCH >= 6 ? 128 : 64); + pan_pool_upload_aligned(bin_pool, binary.data, binary.size, 128); util_dynarray_fini(&binary); ralloc_free(b.shader); @@ -128,8 +127,7 @@ panvk_meta_clear_zs_attachment_shader(struct panfrost_device *pdev, shader_info->push.count = 2; mali_ptr shader = - pan_pool_upload_aligned(bin_pool, binary.data, binary.size, - PAN_ARCH >= 6 ? 128 : 64); + pan_pool_upload_aligned(bin_pool, binary.data, binary.size, 128); util_dynarray_fini(&binary); ralloc_free(b.shader); @@ -172,8 +170,7 @@ panvk_meta_clear_attachments_emit_rsd(struct panfrost_device *pdev, cfg.stencil_front.mask = 0xFF; cfg.stencil_back = cfg.stencil_front; -#if PAN_ARCH >= 6 - cfg.properties.allow_forward_pixel_to_be_killed = PAN_ARCH >= 7 || !zs; + cfg.properties.allow_forward_pixel_to_be_killed = true; cfg.properties.allow_forward_pixel_to_kill = !zs; if (zs) { cfg.properties.zs_update_operation = @@ -186,12 +183,6 @@ panvk_meta_clear_attachments_emit_rsd(struct panfrost_device *pdev, cfg.properties.pixel_kill_operation = MALI_PIXEL_KILL_FORCE_EARLY; } -#else - cfg.properties.shader_reads_tilebuffer = false; - cfg.properties.work_register_count = shader_info->work_reg_count; - cfg.properties.force_early_z = !zs; - cfg.stencil_mask_misc.alpha_test_compare_function = MALI_FUNC_ALWAYS; -#endif } void *bd = rsd_ptr.cpu + pan_size(RENDERER_STATE); @@ -200,9 +191,7 @@ panvk_meta_clear_attachments_emit_rsd(struct panfrost_device *pdev, for (unsigned i = 0; i < rt; i++) { pan_pack(bd, BLEND, cfg) { cfg.enable = false; -#if PAN_ARCH >= 6 cfg.internal.mode = MALI_BLEND_MODE_OFF; -#endif } bd += pan_size(BLEND); @@ -212,9 +201,7 @@ panvk_meta_clear_attachments_emit_rsd(struct panfrost_device *pdev, /* We write the depth/stencil, disable blending on RT0. */ pan_pack(bd, BLEND, cfg) { cfg.enable = false; -#if PAN_ARCH >= 6 cfg.internal.mode = MALI_BLEND_MODE_OFF; -#endif } } else { pan_pack(bd, BLEND, cfg) { @@ -226,7 +213,6 @@ panvk_meta_clear_attachments_emit_rsd(struct panfrost_device *pdev, cfg.equation.alpha.a = MALI_BLEND_OPERAND_A_SRC; cfg.equation.alpha.b = MALI_BLEND_OPERAND_B_SRC; cfg.equation.alpha.c = MALI_BLEND_OPERAND_C_ZERO; -#if PAN_ARCH >= 6 cfg.internal.mode = MALI_BLEND_MODE_OPAQUE; cfg.equation.color_mask = 0xf; cfg.internal.fixed_function.num_comps = 4; @@ -234,10 +220,6 @@ panvk_meta_clear_attachments_emit_rsd(struct panfrost_device *pdev, panfrost_format_to_bifrost_blend(pdev, format, false); cfg.internal.fixed_function.conversion.register_format = shader_info->bifrost.blend[rt].format; -#else - cfg.equation.color_mask = - (1 << util_format_get_nr_components(format)) - 1; -#endif } } @@ -292,12 +274,10 @@ panvk_meta_clear_attachment_emit_tiler_job(struct pan_pool *desc_pool, panfrost_pack_work_groups_compute(invoc, 1, 4, 1, 1, 1, 1, true, false); -#if PAN_ARCH >= 6 pan_section_pack(job.cpu, TILER_JOB, PADDING, cfg); pan_section_pack(job.cpu, TILER_JOB, TILER, cfg) { cfg.address = tiler; } -#endif panfrost_add_job(desc_pool, scoreboard, MALI_JOB_TYPE_TILER, false, false, 0, 0, &job, false); @@ -407,8 +387,8 @@ panvk_meta_clear_attachment(struct panvk_cmd_buffer *cmdbuf, mali_ptr pushconsts = pan_pool_upload_aligned(&cmdbuf->desc_pool.base, clear_value, sizeof(*clear_value), 16); - mali_ptr tsd = PAN_ARCH >= 6 ? batch->tls.gpu : batch->fb.desc.gpu; - mali_ptr tiler = PAN_ARCH >= 6 ? batch->tiler.descs.gpu : 0; + mali_ptr tsd = batch->tls.gpu; + mali_ptr tiler = batch->tiler.descs.gpu; struct panfrost_ptr job; diff --git a/src/panfrost/vulkan/panvk_vX_meta_copy.c b/src/panfrost/vulkan/panvk_vX_meta_copy.c index fa4349c3c4e..3bb2218df87 100644 --- a/src/panfrost/vulkan/panvk_vX_meta_copy.c +++ b/src/panfrost/vulkan/panvk_vX_meta_copy.c @@ -34,7 +34,6 @@ panvk_meta_copy_img_emit_texture(struct panfrost_device *pdev, struct pan_pool *desc_pool, const struct pan_image_view *view) { -#if PAN_ARCH >= 6 struct panfrost_ptr texture = pan_pool_alloc_desc(desc_pool, TEXTURE); size_t payload_size = @@ -46,22 +45,6 @@ panvk_meta_copy_img_emit_texture(struct panfrost_device *pdev, GENX(panfrost_new_texture)(pdev, view, texture.cpu, &surfaces); return texture.gpu; -#else - size_t sz = pan_size(TEXTURE) + - GENX(panfrost_estimate_texture_payload_size)(view); - struct panfrost_ptr texture = - pan_pool_alloc_aligned(desc_pool, sz, pan_alignment(TEXTURE)); - struct panfrost_ptr surfaces = { - .cpu = texture.cpu + pan_size(TEXTURE), - .gpu = texture.gpu + pan_size(TEXTURE), - }; - - GENX(panfrost_new_texture)(pdev, view, texture.cpu, &surfaces); - - return pan_pool_upload_aligned(desc_pool, &texture.gpu, - sizeof(mali_ptr), - sizeof(mali_ptr)); -#endif } static mali_ptr @@ -72,9 +55,7 @@ panvk_meta_copy_img_emit_sampler(struct panfrost_device *pdev, pan_pool_alloc_desc(desc_pool, SAMPLER); pan_pack(sampler.cpu, SAMPLER, cfg) { -#if PAN_ARCH >= 6 cfg.seamless_cube_map = false; -#endif cfg.normalized_coordinates = false; cfg.minify_nearest = true; cfg.magnify_nearest = true; @@ -89,14 +70,10 @@ panvk_meta_copy_emit_varying(struct pan_pool *pool, mali_ptr *varying_bufs, mali_ptr *varyings) { - /* Bifrost needs an empty desc to mark end of prefetching */ - bool padding_buffer = PAN_ARCH >= 6; - struct panfrost_ptr varying = pan_pool_alloc_desc(pool, ATTRIBUTE); struct panfrost_ptr varying_buffer = - pan_pool_alloc_desc_array(pool, (padding_buffer ? 2 : 1), - ATTRIBUTE_BUFFER); + pan_pool_alloc_desc_array(pool, 2, ATTRIBUTE_BUFFER); pan_pack(varying_buffer.cpu, ATTRIBUTE_BUFFER, cfg) { cfg.pointer = coordinates; @@ -104,14 +81,12 @@ panvk_meta_copy_emit_varying(struct pan_pool *pool, cfg.size = cfg.stride * 4; } - if (padding_buffer) { - pan_pack(varying_buffer.cpu + pan_size(ATTRIBUTE_BUFFER), - ATTRIBUTE_BUFFER, cfg); - } + /* Bifrost needs an empty desc to mark end of prefetching */ + pan_pack(varying_buffer.cpu + pan_size(ATTRIBUTE_BUFFER), + ATTRIBUTE_BUFFER, cfg); pan_pack(varying.cpu, ATTRIBUTE, cfg) { cfg.buffer_index = 0; - cfg.offset_enable = PAN_ARCH <= 5; cfg.format = pool->dev->formats[PIPE_FORMAT_R32G32B32_FLOAT].hw; } @@ -174,12 +149,10 @@ panvk_meta_copy_emit_tiler_job(struct pan_pool *desc_pool, panfrost_pack_work_groups_compute(invoc, 1, 4, 1, 1, 1, 1, true, false); -#if PAN_ARCH >= 6 pan_section_pack(job.cpu, TILER_JOB, PADDING, cfg); pan_section_pack(job.cpu, TILER_JOB, TILER, cfg) { cfg.address = tiler; } -#endif panfrost_add_job(desc_pool, scoreboard, MALI_JOB_TYPE_TILER, false, false, 0, 0, &job, false); @@ -219,7 +192,6 @@ panvk_meta_copy_emit_compute_job(struct pan_pool *desc_pool, } -#if PAN_ARCH >= 6 static uint32_t panvk_meta_copy_img_bifrost_raw_format(unsigned texelsize) { @@ -231,7 +203,6 @@ panvk_meta_copy_img_bifrost_raw_format(unsigned texelsize) default: unreachable("Invalid texel size\n"); } } -#endif static mali_ptr panvk_meta_copy_to_img_emit_rsd(struct panfrost_device *pdev, @@ -270,7 +241,6 @@ panvk_meta_copy_to_img_emit_rsd(struct panfrost_device *pdev, cfg.stencil_front.mask = 0xFF; cfg.stencil_back = cfg.stencil_front; -#if PAN_ARCH >= 6 cfg.properties.allow_forward_pixel_to_be_killed = true; cfg.properties.allow_forward_pixel_to_kill = !partialwrite && !readstb; @@ -278,12 +248,6 @@ panvk_meta_copy_to_img_emit_rsd(struct panfrost_device *pdev, MALI_PIXEL_KILL_STRONG_EARLY; cfg.properties.pixel_kill_operation = MALI_PIXEL_KILL_FORCE_EARLY; -#else - cfg.properties.shader_reads_tilebuffer = readstb; - cfg.properties.work_register_count = shader_info->work_reg_count; - cfg.properties.force_early_z = true; - cfg.stencil_mask_misc.alpha_test_compare_function = MALI_FUNC_ALWAYS; -#endif } pan_pack(rsd_ptr.cpu + pan_size(RENDERER_STATE), BLEND, cfg) { @@ -295,7 +259,6 @@ panvk_meta_copy_to_img_emit_rsd(struct panfrost_device *pdev, cfg.equation.alpha.a = MALI_BLEND_OPERAND_A_SRC; cfg.equation.alpha.b = MALI_BLEND_OPERAND_B_SRC; cfg.equation.alpha.c = MALI_BLEND_OPERAND_C_ZERO; -#if PAN_ARCH >= 6 cfg.internal.mode = partialwrite ? MALI_BLEND_MODE_FIXED_FUNCTION : @@ -317,9 +280,6 @@ panvk_meta_copy_to_img_emit_rsd(struct panfrost_device *pdev, MALI_REGISTER_FILE_FORMAT_U16 : MALI_REGISTER_FILE_FORMAT_U32; } -#else - cfg.equation.color_mask = wrmask; -#endif } return rsd_ptr.gpu; @@ -489,7 +449,6 @@ panvk_meta_copy_img2img_shader(struct panfrost_device *pdev, .no_ubo_to_push = true, }; -#if PAN_ARCH >= 6 pan_pack(&inputs.bifrost.rt_conv[0], INTERNAL_CONVERSION, cfg) { cfg.memory_format = (dstcompsz == 2 ? MALI_RG16UI : MALI_RG32UI) << 12; cfg.register_format = dstcompsz == 2 ? @@ -497,7 +456,6 @@ panvk_meta_copy_img2img_shader(struct panfrost_device *pdev, MALI_REGISTER_FILE_FORMAT_U32; } inputs.bifrost.static_rt_conv = true; -#endif struct util_dynarray binary; @@ -507,8 +465,7 @@ panvk_meta_copy_img2img_shader(struct panfrost_device *pdev, shader_info->fs.sample_shading = is_ms; mali_ptr shader = - pan_pool_upload_aligned(bin_pool, binary.data, binary.size, - PAN_ARCH >= 6 ? 128 : 64); + pan_pool_upload_aligned(bin_pool, binary.data, binary.size, 128); util_dynarray_fini(&binary); ralloc_free(b.shader); @@ -742,13 +699,8 @@ panvk_meta_copy_img2img(struct panvk_cmd_buffer *cmdbuf, mali_ptr tsd, tiler; -#if PAN_ARCH >= 6 tsd = batch->tls.gpu; tiler = batch->tiler.descs.gpu; -#else - tsd = batch->fb.desc.gpu; - tiler = 0; -#endif struct panfrost_ptr job; @@ -1032,7 +984,6 @@ panvk_meta_copy_buf2img_shader(struct panfrost_device *pdev, .no_ubo_to_push = true, }; -#if PAN_ARCH >= 6 pan_pack(&inputs.bifrost.rt_conv[0], INTERNAL_CONVERSION, cfg) { cfg.memory_format = (imgcompsz == 2 ? MALI_RG16UI : MALI_RG32UI) << 12; cfg.register_format = imgcompsz == 2 ? @@ -1040,7 +991,6 @@ panvk_meta_copy_buf2img_shader(struct panfrost_device *pdev, MALI_REGISTER_FILE_FORMAT_U32; } inputs.bifrost.static_rt_conv = true; -#endif struct util_dynarray binary; @@ -1049,8 +999,7 @@ panvk_meta_copy_buf2img_shader(struct panfrost_device *pdev, shader_info->push.count = DIV_ROUND_UP(sizeof(struct panvk_meta_copy_buf2img_info), 4); mali_ptr shader = - pan_pool_upload_aligned(bin_pool, binary.data, binary.size, - PAN_ARCH >= 6 ? 128 : 64); + pan_pool_upload_aligned(bin_pool, binary.data, binary.size, 128); util_dynarray_fini(&binary); ralloc_free(b.shader); @@ -1173,13 +1122,8 @@ panvk_meta_copy_buf2img(struct panvk_cmd_buffer *cmdbuf, mali_ptr tsd, tiler; -#if PAN_ARCH >= 6 tsd = batch->tls.gpu; tiler = batch->tiler.descs.gpu; -#else - tsd = batch->fb.desc.gpu; - tiler = 0; -#endif struct panfrost_ptr job; @@ -1495,8 +1439,7 @@ panvk_meta_copy_img2buf_shader(struct panfrost_device *pdev, shader_info->push.count = DIV_ROUND_UP(sizeof(struct panvk_meta_copy_img2buf_info), 4); mali_ptr shader = - pan_pool_upload_aligned(bin_pool, binary.data, binary.size, - PAN_ARCH >= 6 ? 128 : 64); + pan_pool_upload_aligned(bin_pool, binary.data, binary.size, 128); util_dynarray_fini(&binary); ralloc_free(b.shader); @@ -1724,8 +1667,7 @@ panvk_meta_copy_buf2buf_shader(struct panfrost_device *pdev, shader_info->push.count = DIV_ROUND_UP(sizeof(struct panvk_meta_copy_buf2buf_info), 4); mali_ptr shader = - pan_pool_upload_aligned(bin_pool, binary.data, binary.size, - PAN_ARCH >= 6 ? 128 : 64); + pan_pool_upload_aligned(bin_pool, binary.data, binary.size, 128); util_dynarray_fini(&binary); ralloc_free(b.shader); @@ -1854,8 +1796,7 @@ panvk_meta_fill_buf_shader(struct panfrost_device *pdev, shader_info->push.count = DIV_ROUND_UP(sizeof(struct panvk_meta_fill_buf_info), 4); mali_ptr shader = - pan_pool_upload_aligned(bin_pool, binary.data, binary.size, - PAN_ARCH >= 6 ? 128 : 64); + pan_pool_upload_aligned(bin_pool, binary.data, binary.size, 128); util_dynarray_fini(&binary); ralloc_free(b.shader); diff --git a/src/panfrost/vulkan/panvk_vX_pipeline.c b/src/panfrost/vulkan/panvk_vX_pipeline.c index c7c9b01c43f..7333747a7c1 100644 --- a/src/panfrost/vulkan/panvk_vX_pipeline.c +++ b/src/panfrost/vulkan/panvk_vX_pipeline.c @@ -575,7 +575,7 @@ panvk_pipeline_builder_parse_color_blend(struct panvk_pipeline_builder *builder, panvk_per_arch(blend_needs_lowering)(pdev, &pipeline->blend.state, i) ? 0 : pan_blend_constant_mask(out->equation); pipeline->blend.constant[i].index = ffs(constant_mask) - 1; - if (constant_mask && PAN_ARCH >= 6) { + if (constant_mask) { /* On Bifrost, the blend constant is expressed with a UNORM of the * size of the target format. The value is then shifted such that * used bits are in the MSB. Here we calculate the factor at pipeline @@ -747,18 +747,11 @@ panvk_pipeline_update_varying_slot(struct panvk_varyings_info *varyings, const struct pan_shader_varying *varying, bool input) { - bool fs = stage == MESA_SHADER_FRAGMENT; gl_varying_slot loc = varying->location; - enum panvk_varying_buf_id buf_id = - panvk_varying_buf_id(fs, loc); + enum panvk_varying_buf_id buf_id = panvk_varying_buf_id(loc); varyings->stage[stage].loc[varyings->stage[stage].count++] = loc; - if (panvk_varying_is_builtin(stage, loc)) { - varyings->buf_mask |= 1 << buf_id; - return; - } - assert(loc < ARRAY_SIZE(varyings->varying)); enum pipe_format new_fmt = varying->format; @@ -811,8 +804,7 @@ panvk_pipeline_builder_collect_varyings(struct panvk_pipeline_builder *builder, if (pipeline->varyings.varying[loc].format == PIPE_FORMAT_NONE) continue; - enum panvk_varying_buf_id buf_id = - panvk_varying_buf_id(false, loc); + enum panvk_varying_buf_id buf_id = panvk_varying_buf_id(loc); unsigned buf_idx = panvk_varying_buf_index(&pipeline->varyings, buf_id); unsigned varying_sz = panvk_varying_size(&pipeline->varyings, loc); diff --git a/src/panfrost/vulkan/panvk_vX_shader.c b/src/panfrost/vulkan/panvk_vX_shader.c index c5057126930..fde8445ca98 100644 --- a/src/panfrost/vulkan/panvk_vX_shader.c +++ b/src/panfrost/vulkan/panvk_vX_shader.c @@ -91,70 +91,6 @@ panvk_inline_blend_constants(nir_builder *b, nir_instr *instr, void *data) return true; } -#if PAN_ARCH <= 5 -struct panvk_lower_blend_type_conv { - nir_variable *var; - nir_alu_type newtype; - nir_alu_type oldtype; -}; - -static bool -panvk_adjust_rt_type(nir_builder *b, nir_instr *instr, void *data) -{ - if (instr->type != nir_instr_type_intrinsic) - return false; - - nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); - if (intr->intrinsic != nir_intrinsic_store_deref && - intr->intrinsic != nir_intrinsic_load_deref) - return false; - - nir_variable *var = nir_intrinsic_get_var(intr, 0); - if (var->data.mode != nir_var_shader_out || - (var->data.location != FRAG_RESULT_COLOR && - var->data.location < FRAG_RESULT_DATA0)) - return false; - - /* Determine render target for per-RT blending */ - unsigned rt = - (var->data.location == FRAG_RESULT_COLOR) ? 0 : - (var->data.location - FRAG_RESULT_DATA0); - - const struct panvk_lower_blend_type_conv *typeconv = data; - nir_alu_type newtype = typeconv[rt].newtype; - nir_alu_type oldtype = typeconv[rt].oldtype; - - /* No conversion */ - if (newtype == nir_type_invalid || newtype == oldtype) - return false; - - - b->cursor = nir_before_instr(instr); - - nir_deref_instr *deref = nir_build_deref_var(b, typeconv[rt].var); - nir_instr_rewrite_src(&intr->instr, &intr->src[0], - nir_src_for_ssa(&deref->dest.ssa)); - - if (intr->intrinsic == nir_intrinsic_store_deref) { - nir_ssa_def *val = nir_ssa_for_src(b, intr->src[1], 4); - bool clamp = nir_alu_type_get_base_type(newtype) != nir_type_float; - val = nir_convert_with_rounding(b, val, oldtype, newtype, - nir_rounding_mode_undef, clamp); - nir_store_var(b, typeconv[rt].var, val, nir_intrinsic_write_mask(intr)); - } else { - bool clamp = nir_alu_type_get_base_type(oldtype) != nir_type_float; - nir_ssa_def *val = nir_load_var(b, typeconv[rt].var); - val = nir_convert_with_rounding(b, val, newtype, oldtype, - nir_rounding_mode_undef, clamp); - nir_ssa_def_rewrite_uses(&intr->dest.ssa, val); - } - - nir_instr_remove(instr); - - return true; -} -#endif - static void panvk_lower_blend(struct panfrost_device *pdev, nir_shader *nir, @@ -167,9 +103,6 @@ panvk_lower_blend(struct panfrost_device *pdev, .logicop_func = blend_state->logicop_func, }; -#if PAN_ARCH <= 5 - struct panvk_lower_blend_type_conv typeconv[8] = { 0 }; -#endif bool lower_blend = false; for (unsigned rt = 0; rt < blend_state->rt_count; rt++) { @@ -221,47 +154,12 @@ panvk_lower_blend(struct panfrost_device *pdev, rt_state->equation.alpha_invert_dst_factor = false; lower_blend = true; -#if PAN_ARCH >= 6 inputs->bifrost.static_rt_conv = true; inputs->bifrost.rt_conv[rt] = GENX(pan_blend_get_internal_desc)(pdev, fmt, rt, 32, false) >> 32; -#else - if (!panfrost_blendable_formats_v6[fmt].internal) { - nir_variable *outvar = - nir_find_variable_with_location(nir, nir_var_shader_out, FRAG_RESULT_DATA0 + rt); - if (!outvar && !rt) - outvar = nir_find_variable_with_location(nir, nir_var_shader_out, FRAG_RESULT_COLOR); - - assert(outvar); - - const struct util_format_description *format_desc = - util_format_description(fmt); - - typeconv[rt].newtype = pan_unpacked_type_for_format(format_desc); - typeconv[rt].oldtype = nir_get_nir_type_for_glsl_type(outvar->type); - typeconv[rt].var = - nir_variable_create(nir, nir_var_shader_out, - glsl_vector_type(nir_get_glsl_base_type_for_nir_type(typeconv[rt].newtype), - glsl_get_vector_elements(outvar->type)), - outvar->name); - typeconv[rt].var->data.location = outvar->data.location; - inputs->blend.nr_samples = rt_state->nr_samples; - inputs->rt_formats[rt] = rt_state->format; - } -#endif } if (lower_blend) { -#if PAN_ARCH <= 5 - NIR_PASS_V(nir, nir_shader_instructions_pass, - panvk_adjust_rt_type, - nir_metadata_block_index | - nir_metadata_dominance, - &typeconv); - nir_remove_dead_derefs(nir); - nir_remove_dead_variables(nir, nir_var_shader_out, NULL); -#endif - NIR_PASS_V(nir, nir_lower_blend, &options); if (static_blend_constants) { @@ -364,13 +262,6 @@ panvk_per_arch(shader_create)(struct panvk_device *dev, NIR_PASS_V(nir, nir_lower_io_to_temporaries, nir_shader_get_entrypoint(nir), true, true); - const struct nir_lower_sysvals_to_varyings_options sysvals_to_varyings = { - .frag_coord = PAN_ARCH <= 5, - .point_coord = PAN_ARCH <= 5, - .front_face = PAN_ARCH <= 5, - }; - NIR_PASS_V(nir, nir_lower_sysvals_to_varyings, &sysvals_to_varyings); - struct panfrost_sysvals fixed_sysvals; panvk_init_sysvals(&fixed_sysvals, stage); diff --git a/src/panfrost/vulkan/panvk_varyings.h b/src/panfrost/vulkan/panvk_varyings.h index cf07d6783c9..67facc49707 100644 --- a/src/panfrost/vulkan/panvk_varyings.h +++ b/src/panfrost/vulkan/panvk_varyings.h @@ -39,8 +39,6 @@ enum panvk_varying_buf_id { PANVK_VARY_BUF_GENERAL, PANVK_VARY_BUF_POSITION, PANVK_VARY_BUF_PSIZ, - PANVK_VARY_BUF_PNTCOORD, - PANVK_VARY_BUF_FRAGCOORD, /* Keep last */ PANVK_VARY_BUF_MAX, @@ -78,49 +76,18 @@ panvk_varying_buf_index(const struct panvk_varyings_info *varyings, } static inline enum panvk_varying_buf_id -panvk_varying_buf_id(bool fs, gl_varying_slot loc) +panvk_varying_buf_id(gl_varying_slot loc) { switch (loc) { case VARYING_SLOT_POS: - return fs ? PANVK_VARY_BUF_FRAGCOORD : PANVK_VARY_BUF_POSITION; + return PANVK_VARY_BUF_POSITION; case VARYING_SLOT_PSIZ: return PANVK_VARY_BUF_PSIZ; - case VARYING_SLOT_PNTC: - return PANVK_VARY_BUF_PNTCOORD; default: return PANVK_VARY_BUF_GENERAL; } } -static inline bool -panvk_varying_is_builtin(gl_shader_stage stage, gl_varying_slot loc) -{ - bool fs = stage == MESA_SHADER_FRAGMENT; - - switch (loc) { - case VARYING_SLOT_POS: - case VARYING_SLOT_PNTC: - return fs; - default: - return false; - } -} - -#if defined(PAN_ARCH) && PAN_ARCH <= 5 -static inline enum mali_attribute_special -panvk_varying_special_buf_id(enum panvk_varying_buf_id buf_id) -{ - switch (buf_id) { - case PANVK_VARY_BUF_PNTCOORD: - return MALI_ATTRIBUTE_SPECIAL_POINT_COORD; - case PANVK_VARY_BUF_FRAGCOORD: - return MALI_ATTRIBUTE_SPECIAL_FRAG_COORD; - default: - return 0; - } -} -#endif - static inline unsigned panvk_varying_size(const struct panvk_varyings_info *varyings, gl_varying_slot loc)