From c00d45cb457a68d89960bf003e1e2c9f3600d495 Mon Sep 17 00:00:00 2001 From: Karol Herbst Date: Sun, 7 Jan 2018 00:35:37 +0100 Subject: [PATCH] nv50/ir/nir: implement load_per_vertex_output v4: use smarter getIndirect helper use new getSlotAddress helper v5: use loadFrom helper v8: don't require C++11 features Signed-off-by: Karol Herbst --- .../nouveau/codegen/nv50_ir_from_nir.cpp | 23 +++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp index ad68fb4505f..c379eb72c1e 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp @@ -2163,6 +2163,29 @@ Converter::visit(nir_intrinsic_instr *insn) } break; } + case nir_intrinsic_load_per_vertex_output: { + const DataType dType = getDType(insn); + LValues &newDefs = convert(&insn->dest); + Value *indirectVertex; + Value *indirectOffset; + uint32_t baseVertex = getIndirect(&insn->src[0], 0, indirectVertex); + uint32_t idx = getIndirect(insn, 1, 0, indirectOffset); + Value *vtxBase = NULL; + + if (indirectVertex) + vtxBase = indirectVertex; + else + vtxBase = loadImm(NULL, baseVertex); + + vtxBase = mkOp2v(OP_ADD, TYPE_U32, getSSA(4, FILE_ADDRESS), outBase, vtxBase); + + for (uint8_t i = 0u; i < insn->num_components; ++i) { + uint32_t address = getSlotAddress(insn, idx, i); + loadFrom(FILE_SHADER_OUTPUT, 0, dType, newDefs[i], address, 0, + indirectOffset, vtxBase, info->in[idx].patch); + } + break; + } case nir_intrinsic_emit_vertex: case nir_intrinsic_end_primitive: { uint32_t idx = nir_intrinsic_stream_id(insn);