asahi: Determine tiling vs linear for internal textures
Logic lifted from Panfrost. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11086>
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@ -118,6 +118,39 @@ agx_resource_get_handle(struct pipe_screen *pscreen,
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unreachable("Handles todo");
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}
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static inline bool
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agx_is_2d(const struct agx_resource *pres)
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{
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switch (pres->base.target) {
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case PIPE_TEXTURE_2D:
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case PIPE_TEXTURE_RECT:
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return true;
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default:
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return false;
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}
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}
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static bool
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agx_should_tile(struct agx_device *dev,
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const struct agx_resource *pres)
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{
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const unsigned valid_binding =
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PIPE_BIND_DEPTH_STENCIL |
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PIPE_BIND_RENDER_TARGET |
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PIPE_BIND_BLENDABLE |
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PIPE_BIND_SAMPLER_VIEW |
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PIPE_BIND_DISPLAY_TARGET |
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PIPE_BIND_SCANOUT |
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PIPE_BIND_SHARED;
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unsigned bpp = util_format_get_blocksizebits(pres->base.format);
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bool can_tile = agx_is_2d(pres)
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&& (bpp == 32)
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&& ((pres->base.bind & ~valid_binding) == 0);
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return can_tile && (pres->base.usage != PIPE_USAGE_STREAM);
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}
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static struct pipe_resource *
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agx_resource_create(struct pipe_screen *screen,
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@ -126,10 +159,6 @@ agx_resource_create(struct pipe_screen *screen,
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struct agx_device *dev = agx_device(screen);
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struct agx_resource *nresource;
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unsigned stride;
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uint64_t modifier = DRM_FORMAT_MOD_LINEAR;
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if (templ->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW))
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modifier = DRM_FORMAT_MOD_APPLE_64X64_MORTON_ORDER;
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nresource = CALLOC_STRUCT(agx_resource);
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if (!nresource)
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@ -138,7 +167,12 @@ agx_resource_create(struct pipe_screen *screen,
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stride = util_format_get_stride(templ->format, templ->width0);
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nresource->base = *templ;
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nresource->base.screen = screen;
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nresource->modifier = modifier;
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nresource->modifier =
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agx_should_tile(dev, nresource) ?
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DRM_FORMAT_MOD_APPLE_64X64_MORTON_ORDER :
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DRM_FORMAT_MOD_LINEAR;
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nresource->slices[0].line_stride = stride;
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unsigned size = 4 * ALIGN_POT(templ->width0, 64) * ALIGN_POT(templ->height0, 64) * templ->depth0;
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