gallium/radeon: use a top-of-pipe timestamp for the start of TIME_ELAPSED
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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@ -54,6 +54,17 @@
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#define PKT3_WAIT_REG_MEM 0x3C
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#define WAIT_REG_MEM_EQUAL 3
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#define WAIT_REG_MEM_MEM_SPACE(x) (((unsigned)(x) & 0x3) << 4)
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#define PKT3_COPY_DATA 0x40
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#define COPY_DATA_SRC_SEL(x) ((x) & 0xf)
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#define COPY_DATA_REG 0
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#define COPY_DATA_MEM 1
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#define COPY_DATA_PERF 4
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#define COPY_DATA_IMM 5
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#define COPY_DATA_TIMESTAMP 9
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#define COPY_DATA_DST_SEL(x) (((unsigned)(x) & 0xf) << 8)
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#define COPY_DATA_MEM_ASYNC 5
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#define COPY_DATA_COUNT_SEL (1 << 16)
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#define COPY_DATA_WR_CONFIRM (1 << 20)
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#define PKT3_EVENT_WRITE 0x46
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#define PKT3_EVENT_WRITE_EOP 0x47
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#define EOP_DATA_SEL(x) ((x) << 29)
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@ -689,8 +689,25 @@ static void r600_query_hw_do_emit_start(struct r600_common_context *ctx,
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radeon_emit(cs, va >> 32);
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break;
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case PIPE_QUERY_TIME_ELAPSED:
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if (ctx->chip_class >= SI) {
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/* Write the timestamp from the CP not waiting for
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* outstanding draws (top-of-pipe).
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*/
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radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
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radeon_emit(cs, COPY_DATA_COUNT_SEL |
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COPY_DATA_SRC_SEL(COPY_DATA_TIMESTAMP) |
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COPY_DATA_DST_SEL(COPY_DATA_MEM_ASYNC));
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radeon_emit(cs, 0);
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radeon_emit(cs, 0);
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radeon_emit(cs, va);
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radeon_emit(cs, va >> 32);
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} else {
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/* Write the timestamp after the last draw is done.
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* (bottom-of-pipe)
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*/
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r600_gfx_write_event_eop(ctx, EVENT_TYPE_BOTTOM_OF_PIPE_TS,
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0, 3, NULL, va, 0, 0);
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}
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break;
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case PIPE_QUERY_PIPELINE_STATISTICS:
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radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
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