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gallium/radeon: rename winsys buffer_get/set_tiling to buffer_get/set_metadata 

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2016-02-24 01:13:22 +01:00
parent 6011d7cf25
commit bd1feb2827
5 changed files with 20 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/gallium/drivers/r300/r300_texture.c
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@ -1064,7 +1064,7 @@ r300_texture_create_object(struct r300_screen *rscreen,
tiling.microtile = tex->tex.microtile; tiling.microtile = tex->tex.microtile;
tiling.macrotile = tex->tex.macrotile[0]; tiling.macrotile = tex->tex.macrotile[0];
tiling.stride = tex->tex.stride_in_bytes[0]; tiling.stride = tex->tex.stride_in_bytes[0];
rws->buffer_set_tiling(tex->buf, &tiling); rws->buffer_set_metadata(tex->buf, &tiling);
return tex; return tex;
@ -1120,7 +1120,7 @@ struct pipe_resource *r300_texture_from_handle(struct pipe_screen *screen,
if (!buffer) if (!buffer)
return NULL; return NULL;
rws->buffer_get_tiling(buffer, &tiling); rws->buffer_get_metadata(buffer, &tiling);
/* Enforce a microtiled zbuffer. */ /* Enforce a microtiled zbuffer. */
if (util_format_is_depth_or_stencil(base->format) && if (util_format_is_depth_or_stencil(base->format) &&

4
src/gallium/drivers/radeon/r600_texture.c
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@ -253,7 +253,7 @@ static boolean r600_texture_get_handle(struct pipe_screen* screen,
metadata.stride = surface->level[0].pitch_bytes; metadata.stride = surface->level[0].pitch_bytes;
metadata.scanout = (surface->flags & RADEON_SURF_SCANOUT) != 0; metadata.scanout = (surface->flags & RADEON_SURF_SCANOUT) != 0;
rscreen->ws->buffer_set_tiling(resource->buf, &metadata); rscreen->ws->buffer_set_metadata(resource->buf, &metadata);
return rscreen->ws->buffer_get_handle(resource->buf, return rscreen->ws->buffer_get_handle(resource->buf,
surface->level[0].pitch_bytes, whandle); surface->level[0].pitch_bytes, whandle);
@ -901,7 +901,7 @@ static struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen
if (!buf) if (!buf)
return NULL; return NULL;
rscreen->ws->buffer_get_tiling(buf, &metadata); rscreen->ws->buffer_get_metadata(buf, &metadata);
surface.bankw = metadata.bankw; surface.bankw = metadata.bankw;
surface.bankh = metadata.bankh; surface.bankh = metadata.bankh;

8
src/gallium/drivers/radeon/radeon_winsys.h
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@ -475,8 +475,8 @@ struct radeon_winsys {
* \param buf A winsys buffer object to get the flags from. * \param buf A winsys buffer object to get the flags from.
* \param md Metadata * \param md Metadata
*/ */
void (*buffer_get_tiling)(struct pb_buffer *buf, void (*buffer_get_metadata)(struct pb_buffer *buf,
struct radeon_bo_metadata *md); struct radeon_bo_metadata *md);
/** /**
* Set buffer metadata. * Set buffer metadata.
@ -485,8 +485,8 @@ struct radeon_winsys {
* \param buf A winsys buffer object to set the flags for. * \param buf A winsys buffer object to set the flags for.
* \param md Metadata * \param md Metadata
*/ */
void (*buffer_set_tiling)(struct pb_buffer *buf, void (*buffer_set_metadata)(struct pb_buffer *buf,
struct radeon_bo_metadata *md); struct radeon_bo_metadata *md);
/** /**
* Get a winsys buffer from a winsys handle. The internal structure * Get a winsys buffer from a winsys handle. The internal structure

12
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
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@ -390,8 +390,8 @@ static unsigned eg_tile_split_rev(unsigned eg_tile_split)
} }
} }
static void amdgpu_bo_get_tiling(struct pb_buffer *_buf, static void amdgpu_buffer_get_metadata(struct pb_buffer *_buf,
struct radeon_bo_metadata *md) struct radeon_bo_metadata *md)
{ {
struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf); struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf);
struct amdgpu_bo_info info = {0}; struct amdgpu_bo_info info = {0};
@ -419,8 +419,8 @@ static void amdgpu_bo_get_tiling(struct pb_buffer *_buf,
md->scanout = AMDGPU_TILING_GET(tiling_flags, MICRO_TILE_MODE) == 0; /* DISPLAY */ md->scanout = AMDGPU_TILING_GET(tiling_flags, MICRO_TILE_MODE) == 0; /* DISPLAY */
} }
static void amdgpu_bo_set_tiling(struct pb_buffer *_buf, static void amdgpu_buffer_set_metadata(struct pb_buffer *_buf,
struct radeon_bo_metadata *md) struct radeon_bo_metadata *md)
{ {
struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf); struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(_buf);
struct amdgpu_bo_metadata metadata = {0}; struct amdgpu_bo_metadata metadata = {0};
@ -702,8 +702,8 @@ static uint64_t amdgpu_bo_get_va(struct pb_buffer *buf)
void amdgpu_bo_init_functions(struct amdgpu_winsys *ws) void amdgpu_bo_init_functions(struct amdgpu_winsys *ws)
{ {
ws->base.buffer_set_tiling = amdgpu_bo_set_tiling; ws->base.buffer_set_metadata = amdgpu_buffer_set_metadata;
ws->base.buffer_get_tiling = amdgpu_bo_get_tiling; ws->base.buffer_get_metadata = amdgpu_buffer_get_metadata;
ws->base.buffer_map = amdgpu_bo_map; ws->base.buffer_map = amdgpu_bo_map;
ws->base.buffer_unmap = amdgpu_bo_unmap; ws->base.buffer_unmap = amdgpu_bo_unmap;
ws->base.buffer_wait = amdgpu_bo_wait; ws->base.buffer_wait = amdgpu_bo_wait;

12
src/gallium/winsys/radeon/drm/radeon_drm_bo.c
View File

@ -636,8 +636,8 @@ static unsigned eg_tile_split_rev(unsigned eg_tile_split)
} }
} }
static void radeon_bo_get_tiling(struct pb_buffer *_buf, static void radeon_bo_get_metadata(struct pb_buffer *_buf,
struct radeon_bo_metadata *md) struct radeon_bo_metadata *md)
{ {
struct radeon_bo *bo = radeon_bo(_buf); struct radeon_bo *bo = radeon_bo(_buf);
struct drm_radeon_gem_set_tiling args; struct drm_radeon_gem_set_tiling args;
@ -670,8 +670,8 @@ static void radeon_bo_get_tiling(struct pb_buffer *_buf,
md->scanout = bo->rws->gen >= DRV_SI && !(args.tiling_flags & RADEON_TILING_R600_NO_SCANOUT); md->scanout = bo->rws->gen >= DRV_SI && !(args.tiling_flags & RADEON_TILING_R600_NO_SCANOUT);
} }
static void radeon_bo_set_tiling(struct pb_buffer *_buf, static void radeon_bo_set_metadata(struct pb_buffer *_buf,
struct radeon_bo_metadata *md) struct radeon_bo_metadata *md)
{ {
struct radeon_bo *bo = radeon_bo(_buf); struct radeon_bo *bo = radeon_bo(_buf);
struct drm_radeon_gem_set_tiling args; struct drm_radeon_gem_set_tiling args;
@ -1040,8 +1040,8 @@ static uint64_t radeon_winsys_bo_va(struct pb_buffer *buf)
void radeon_drm_bo_init_functions(struct radeon_drm_winsys *ws) void radeon_drm_bo_init_functions(struct radeon_drm_winsys *ws)
{ {
ws->base.buffer_set_tiling = radeon_bo_set_tiling; ws->base.buffer_set_metadata = radeon_bo_set_metadata;
ws->base.buffer_get_tiling = radeon_bo_get_tiling; ws->base.buffer_get_metadata = radeon_bo_get_metadata;
ws->base.buffer_map = radeon_bo_map; ws->base.buffer_map = radeon_bo_map;
ws->base.buffer_unmap = radeon_bo_unmap; ws->base.buffer_unmap = radeon_bo_unmap;
ws->base.buffer_wait = radeon_bo_wait; ws->base.buffer_wait = radeon_bo_wait;