r300g: remove unused code
This commit is contained in:
Marek Olšák
parent
a0ce955764
commit
bc5778e202
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@ -30,8 +30,6 @@
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#define R300_TEXTURE_USAGE_TRANSFER PIPE_TEXTURE_USAGE_CUSTOM
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struct radeon_winsys;
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struct r300_screen {
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/* Parent class */
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struct pipe_screen screen;
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@ -237,7 +237,7 @@ r300_buffer_map_range(struct pipe_screen *screen,
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}
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}
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just_map:
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map = rws->buffer_map(rws, rbuf->buf, usage | R300_USAGE_FLAG_DONT_SYNC);
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map = rws->buffer_map(rws, rbuf->buf, usage);
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return map;
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}
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@ -49,8 +49,6 @@ enum r300_value_id {
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R300_VID_Z_PIPES,
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};
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#define R300_USAGE_FLAG_DONT_SYNC (1 << 17)
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struct r300_winsys_screen {
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void (*destroy)(struct r300_winsys_screen *ws);
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@ -1,388 +0,0 @@
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/*
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* Copyright © 2008 Jérôme Glisse
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* 2009 Corbin Simpson
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*/
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/*
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* Authors:
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* Jérôme Glisse <glisse@freedesktop.org>
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* Corbin Simpson <MostAwesomeDude@gmail.com>
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*/
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#include "radeon_buffer.h"
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#include "radeon_drm.h"
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#include "util/u_format.h"
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#include "util/u_math.h"
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#include "util/u_memory.h"
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#include "radeon_bo_gem.h"
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#include <X11/Xutil.h>
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struct radeon_vl_context
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{
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Display *display;
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int screen;
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Drawable drawable;
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};
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static const char *radeon_get_name(struct pipe_winsys *ws)
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{
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return "Radeon/GEM+KMS";
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}
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static uint32_t radeon_domain_from_usage(unsigned usage)
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{
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uint32_t domain = 0;
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if (usage & PIPE_BUFFER_USAGE_GPU_WRITE) {
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domain |= RADEON_GEM_DOMAIN_VRAM;
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}
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if (usage & PIPE_BUFFER_USAGE_PIXEL) {
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domain |= RADEON_GEM_DOMAIN_VRAM;
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}
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if (usage & PIPE_BUFFER_USAGE_VERTEX) {
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domain |= RADEON_GEM_DOMAIN_GTT;
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}
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if (usage & PIPE_BUFFER_USAGE_INDEX) {
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domain |= RADEON_GEM_DOMAIN_GTT;
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}
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return domain;
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}
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static struct pipe_buffer *radeon_buffer_create(struct pipe_winsys *ws,
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unsigned alignment,
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unsigned usage,
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unsigned size)
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{
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struct radeon_winsys *radeon_ws = (struct radeon_winsys *)ws;
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struct radeon_pipe_buffer *radeon_buffer;
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struct pb_desc desc;
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uint32_t domain;
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radeon_buffer = CALLOC_STRUCT(radeon_pipe_buffer);
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if (radeon_buffer == NULL) {
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return NULL;
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}
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pipe_reference_init(&radeon_buffer->base.reference, 1);
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radeon_buffer->base.alignment = alignment;
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radeon_buffer->base.usage = usage;
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radeon_buffer->base.size = size;
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if (usage & PIPE_BUFFER_USAGE_CONSTANT && is_r3xx(radeon_ws->pci_id)) {
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/* Don't bother allocating a BO, as it'll never get to the card. */
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desc.alignment = alignment;
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desc.usage = usage;
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radeon_buffer->pb = pb_malloc_buffer_create(size, &desc);
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return &radeon_buffer->base;
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}
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domain = radeon_domain_from_usage(usage);
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radeon_buffer->bo = radeon_bo_open(radeon_ws->priv->bom, 0, size,
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alignment, domain, 0);
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if (radeon_buffer->bo == NULL) {
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FREE(radeon_buffer);
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return NULL;
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}
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return &radeon_buffer->base;
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}
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static struct pipe_buffer *radeon_buffer_user_create(struct pipe_winsys *ws,
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void *ptr,
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unsigned bytes)
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{
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struct radeon_pipe_buffer *radeon_buffer;
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radeon_buffer =
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(struct radeon_pipe_buffer*)radeon_buffer_create(ws, 0, 0, bytes);
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if (radeon_buffer == NULL) {
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return NULL;
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}
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radeon_bo_map(radeon_buffer->bo, 1);
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memcpy(radeon_buffer->bo->ptr, ptr, bytes);
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radeon_bo_unmap(radeon_buffer->bo);
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return &radeon_buffer->base;
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}
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static struct pipe_buffer *radeon_surface_buffer_create(struct pipe_winsys *ws,
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unsigned width,
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unsigned height,
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enum pipe_format format,
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unsigned usage,
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unsigned tex_usage,
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unsigned *stride)
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{
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/* Radeons enjoy things in multiples of 32. */
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/* XXX this can be 32 when POT */
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const unsigned alignment = 64;
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unsigned nblocksy, size;
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nblocksy = util_format_get_nblocksy(format, height);
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*stride = align(util_format_get_stride(format, width), alignment);
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size = *stride * nblocksy;
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return radeon_buffer_create(ws, 64, usage, size);
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}
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static void radeon_buffer_del(struct pipe_buffer *buffer)
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{
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struct radeon_pipe_buffer *radeon_buffer =
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(struct radeon_pipe_buffer*)buffer;
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if (radeon_buffer->pb) {
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pipe_reference_init(&radeon_buffer->pb->base.reference, 0);
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pb_destroy(radeon_buffer->pb);
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}
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if (radeon_buffer->bo) {
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radeon_bo_unref(radeon_buffer->bo);
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}
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FREE(radeon_buffer);
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}
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static void *radeon_buffer_map(struct pipe_winsys *ws,
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struct pipe_buffer *buffer,
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unsigned flags)
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{
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struct radeon_winsys_priv *priv = ((struct radeon_winsys *)ws)->priv;
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struct radeon_pipe_buffer *radeon_buffer =
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(struct radeon_pipe_buffer*)buffer;
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int write = 0;
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if (radeon_buffer->pb) {
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return pb_map(radeon_buffer->pb, flags);
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}
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if (flags & PIPE_BUFFER_USAGE_DONTBLOCK) {
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uint32_t domain;
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if (radeon_bo_is_busy(radeon_buffer->bo, &domain))
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return NULL;
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}
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if (radeon_bo_is_referenced_by_cs(radeon_buffer->bo, priv->cs)) {
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priv->flush_cb(priv->flush_data);
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}
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if (flags & PIPE_BUFFER_USAGE_CPU_WRITE) {
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write = 1;
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}
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if (radeon_bo_map(radeon_buffer->bo, write)) {
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return NULL;
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}
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return radeon_buffer->bo->ptr;
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}
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static void radeon_buffer_unmap(struct pipe_winsys *ws,
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struct pipe_buffer *buffer)
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{
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struct radeon_pipe_buffer *radeon_buffer =
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(struct radeon_pipe_buffer*)buffer;
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if (radeon_buffer->pb) {
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pb_unmap(radeon_buffer->pb);
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} else {
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radeon_bo_unmap(radeon_buffer->bo);
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}
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}
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static boolean radeon_is_buffer_referenced(struct radeon_winsys *ws,
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struct pipe_buffer *buffer)
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{
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struct radeon_pipe_buffer *radeon_buffer =
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(struct radeon_pipe_buffer*)buffer;
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uint32_t domain;
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/* Referenced by CS or HW. */
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return radeon_bo_is_referenced_by_cs(radeon_buffer->bo, ws->priv->cs) ||
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radeon_bo_is_busy(radeon_buffer->bo, &domain);
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}
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static void radeon_buffer_set_tiling(struct radeon_winsys *ws,
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struct pipe_buffer *buffer,
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uint32_t pitch,
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boolean microtiled,
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boolean macrotiled)
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{
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struct radeon_winsys_priv *priv = ((struct radeon_winsys *)ws)->priv;
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struct radeon_pipe_buffer *radeon_buffer =
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(struct radeon_pipe_buffer*)buffer;
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uint32_t flags = 0, old_flags, old_pitch;
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if (microtiled) {
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flags |= RADEON_BO_FLAGS_MICRO_TILE;
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}
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if (macrotiled) {
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flags |= RADEON_BO_FLAGS_MACRO_TILE;
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}
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radeon_bo_get_tiling(radeon_buffer->bo, &old_flags, &old_pitch);
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if (flags != old_flags || pitch != old_pitch) {
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/* Tiling determines how DRM treats the buffer data.
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* We must flush CS when changing it if the buffer is referenced. */
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if (radeon_bo_is_referenced_by_cs(radeon_buffer->bo, priv->cs)) {
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priv->flush_cb(priv->flush_data);
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}
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radeon_bo_set_tiling(radeon_buffer->bo, flags, pitch);
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}
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}
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static void radeon_fence_reference(struct pipe_winsys *ws,
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struct pipe_fence_handle **ptr,
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struct pipe_fence_handle *pfence)
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{
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}
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static int radeon_fence_signalled(struct pipe_winsys *ws,
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struct pipe_fence_handle *pfence,
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unsigned flag)
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{
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return 1;
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}
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static int radeon_fence_finish(struct pipe_winsys *ws,
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struct pipe_fence_handle *pfence,
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unsigned flag)
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{
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return 0;
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}
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/* Create a buffer from a handle. */
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static struct pipe_buffer* radeon_buffer_from_handle(struct radeon_winsys *radeon_ws,
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struct pipe_screen *screen,
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struct winsys_handle *whandle,
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unsigned *stride)
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{
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struct radeon_bo_manager* bom = radeon_ws->priv->bom;
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struct radeon_pipe_buffer* radeon_buffer;
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struct radeon_bo* bo = NULL;
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bo = radeon_bo_open(bom, whandle->handle, 0, 0, 0, 0);
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if (bo == NULL) {
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return NULL;
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}
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radeon_buffer = CALLOC_STRUCT(radeon_pipe_buffer);
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if (radeon_buffer == NULL) {
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radeon_bo_unref(bo);
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return NULL;
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}
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pipe_reference_init(&radeon_buffer->base.reference, 1);
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radeon_buffer->base.screen = screen;
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radeon_buffer->base.usage = PIPE_BUFFER_USAGE_PIXEL;
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radeon_buffer->bo = bo;
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*stride = whandle->stride;
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return &radeon_buffer->base;
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}
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static boolean radeon_buffer_get_handle(struct radeon_winsys *radeon_ws,
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struct pipe_buffer *buffer,
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unsigned stride,
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struct winsys_handle *whandle)
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{
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int retval, fd;
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struct drm_gem_flink flink;
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struct radeon_pipe_buffer* radeon_buffer;
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radeon_buffer = (struct radeon_pipe_buffer*)buffer;
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if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
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if (!radeon_buffer->flinked) {
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fd = radeon_ws->priv->fd;
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flink.handle = radeon_buffer->bo->handle;
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retval = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink);
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if (retval) {
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debug_printf("radeon: DRM_IOCTL_GEM_FLINK failed, error %d\n",
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retval);
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return FALSE;
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}
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radeon_buffer->flink = flink.name;
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radeon_buffer->flinked = TRUE;
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}
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whandle->handle = radeon_buffer->flink;
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} else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
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whandle->handle = ((struct radeon_pipe_buffer*)buffer)->bo->handle;
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}
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whandle->stride = stride;
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return TRUE;
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}
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struct radeon_winsys* radeon_pipe_winsys(int fd)
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{
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struct radeon_winsys* radeon_ws;
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radeon_ws = CALLOC_STRUCT(radeon_winsys);
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if (radeon_ws == NULL) {
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return NULL;
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}
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radeon_ws->priv = CALLOC_STRUCT(radeon_winsys_priv);
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if (radeon_ws->priv == NULL) {
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FREE(radeon_ws);
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return NULL;
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}
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radeon_ws->priv->fd = fd;
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radeon_ws->priv->bom = radeon_bo_manager_gem_ctor(fd);
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radeon_ws->base.flush_frontbuffer = NULL; /* overriden by co-state tracker */
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radeon_ws->base.buffer_create = radeon_buffer_create;
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radeon_ws->base.user_buffer_create = radeon_buffer_user_create;
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radeon_ws->base.surface_buffer_create = radeon_surface_buffer_create;
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radeon_ws->base.buffer_map = radeon_buffer_map;
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radeon_ws->base.buffer_unmap = radeon_buffer_unmap;
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radeon_ws->base.buffer_destroy = radeon_buffer_del;
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radeon_ws->base.fence_reference = radeon_fence_reference;
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radeon_ws->base.fence_signalled = radeon_fence_signalled;
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radeon_ws->base.fence_finish = radeon_fence_finish;
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radeon_ws->base.get_name = radeon_get_name;
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radeon_ws->buffer_set_tiling = radeon_buffer_set_tiling;
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radeon_ws->buffer_from_handle = radeon_buffer_from_handle;
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radeon_ws->buffer_get_handle = radeon_buffer_get_handle;
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radeon_ws->is_buffer_referenced = radeon_is_buffer_referenced;
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return radeon_ws;
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}
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@ -69,8 +69,6 @@ void radeon_drm_bufmgr_write_reloc(struct pb_buffer *_buf,
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uint32_t rd, uint32_t wd,
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uint32_t flags);
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struct radeon_libdrm_winsys* radeon_pipe_winsys(int fd);
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struct pb_buffer *radeon_drm_bufmgr_create_buffer_from_handle(struct pb_manager *_mgr,
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uint32_t handle);
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