zink: fix 32bit bo rewriting
this was correct for 64bit loads and manually converted 32bit loads (e.g., bindless),
but it was broken for the case where 64bit was not supported, as the offset wasn't
being correctly adjusted
break out the offset division to hopefully make this a little clearer
Fixes: 150d6ee97e
("zink: move all 64-32bit shader load rewriting to nir pass")
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16669>
This commit is contained in:
parent
ea8fc23119
commit
bbe5136658
|
@ -19,160 +19,13 @@ GTF-GL46.gtf40.GL3Tests.transform_feedback3.transform_feedback3_streams_overflow
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GTF-GL46.gtf40.GL3Tests.transform_feedback3.transform_feedback3_streams_queried,Fail
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KHR-GL46.buffer_storage.map_persistent_draw,Fail
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KHR-GL46.compute_shader.fp64-case1,Crash
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KHR-GL46.compute_shader.fp64-case2,Fail
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KHR-GL46.compute_shader.fp64-case3,Crash
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KHR-GL46.copy_image.functional,Fail
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KHR-GL46.direct_state_access.buffers_functional,Fail
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KHR-GL46.geometry_shader.api.max_atomic_counters,Fail
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KHR-GL46.gpu_shader_fp64.builtin.abs_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.abs_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.abs_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.ceil_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.ceil_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.ceil_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.clamp_against_scalar_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.clamp_against_scalar_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.clamp_against_scalar_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.clamp_double,Fail
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KHR-GL46.gpu_shader_fp64.builtin.clamp_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.clamp_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.clamp_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.cross_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.determinant_dmat2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.determinant_dmat3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.distance_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.distance_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.distance_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.dot_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.dot_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.dot_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.equal_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.equal_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.equal_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.faceforward_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.faceforward_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.faceforward_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.floor_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.floor_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.floor_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.fma_double,Fail
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KHR-GL46.gpu_shader_fp64.builtin.fma_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.fma_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.fma_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.fract_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.fract_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.fract_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.frexp_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.frexp_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.frexp_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.greaterthan_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.greaterthan_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.greaterthan_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.greaterthanequal_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.greaterthanequal_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.greaterthanequal_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.inverse_dmat2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.inverse_dmat3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.inversesqrt_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.inversesqrt_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.inversesqrt_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.ldexp_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.ldexp_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.ldexp_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.length_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.length_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.length_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.lessthan_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.lessthan_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.lessthan_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.lessthanequal_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.lessthanequal_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.lessthanequal_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.matrixcompmult_dmat2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.matrixcompmult_dmat2x3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.matrixcompmult_dmat2x4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.matrixcompmult_dmat3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.matrixcompmult_dmat3x2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.matrixcompmult_dmat3x4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.matrixcompmult_dmat4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.matrixcompmult_dmat4x2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.matrixcompmult_dmat4x3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.max_against_scalar_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.max_against_scalar_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.max_against_scalar_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.max_double,Fail
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KHR-GL46.gpu_shader_fp64.builtin.max_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.max_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.max_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.min_against_scalar_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.min_against_scalar_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.min_against_scalar_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.min_double,Fail
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KHR-GL46.gpu_shader_fp64.builtin.min_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.min_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.min_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.mix_double,Fail
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KHR-GL46.gpu_shader_fp64.builtin.mix_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.mix_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.mix_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.mod_against_scalar_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.mod_against_scalar_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.mod_against_scalar_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.mod_double,Fail
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KHR-GL46.gpu_shader_fp64.builtin.mod_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.mod_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.mod_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.modf_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.modf_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.modf_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.normalize_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.normalize_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.normalize_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.notequal_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.notequal_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.notequal_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.outerproduct_dmat2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.outerproduct_dmat2x3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.outerproduct_dmat2x4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.outerproduct_dmat3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.outerproduct_dmat3x2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.outerproduct_dmat3x4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.outerproduct_dmat4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.outerproduct_dmat4x2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.outerproduct_dmat4x3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.reflect_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.reflect_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.reflect_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.refract_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.refract_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.refract_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.round_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.round_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.round_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.roundeven_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.roundeven_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.roundeven_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.smoothstep_against_scalar_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.smoothstep_against_scalar_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.smoothstep_against_scalar_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.smoothstep_double,Fail
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KHR-GL46.gpu_shader_fp64.builtin.smoothstep_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.smoothstep_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.smoothstep_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.sqrt_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.sqrt_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.sqrt_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.step_against_scalar_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.step_against_scalar_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.step_against_scalar_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.step_double,Fail
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KHR-GL46.gpu_shader_fp64.builtin.step_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.step_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.step_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.builtin.trunc_dvec2,Fail
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KHR-GL46.gpu_shader_fp64.builtin.trunc_dvec3,Fail
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KHR-GL46.gpu_shader_fp64.builtin.trunc_dvec4,Fail
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KHR-GL46.gpu_shader_fp64.fp64.max_uniform_components,Fail
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KHR-GL46.limits.max_fragment_input_components,Fail
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KHR-GL46.packed_pixels.pbo_rectangle.r11f_g11f_b10f,Fail
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KHR-GL46.packed_pixels.pbo_rectangle.r16,Fail
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@ -235,14 +88,9 @@ KHR-GL46.texture_view.view_classes,Fail
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KHR-GL46.vertex_attrib_64bit.vao,Fail
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KHR-Single-GL46.arrays_of_arrays_gl.AtomicUsage,Fail
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KHR-Single-GL46.arrays_of_arrays_gl.SubroutineFunctionCalls2,Crash
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KHR-Single-GL46.enhanced_layouts.ssb_member_offset_and_align,Fail
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KHR-Single-GL46.enhanced_layouts.uniform_block_member_offset_and_align,Fail
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KHR-Single-GL46.enhanced_layouts.varying_structure_locations,Crash
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KHR-Single-GL46.enhanced_layouts.xfb_capture_inactive_output_block_member,Fail
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KHR-Single-GL46.enhanced_layouts.xfb_capture_struct,Fail
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KHR-Single-GL46.enhanced_layouts.xfb_global_buffer,Fail
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KHR-Single-GL46.enhanced_layouts.xfb_override_qualifiers_with_api,Fail
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KHR-Single-GL46.enhanced_layouts.xfb_stride,Fail
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KHR-Single-GL46.enhanced_layouts.xfb_struct_explicit_location,Crash
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KHR-Single-GL46.enhanced_layouts.xfb_vertex_streams,Fail
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dEQP-GLES3.functional.occlusion_query.depth_clear,Fail
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@ -338,7 +186,6 @@ dEQP-GLES31.functional.texture.border_clamp.formats.depth24_stencil8_sample_dept
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dEQP-GLES31.functional.texture.border_clamp.formats.depth24_stencil8_sample_depth.nearest_size_pot,Fail
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dEQP-GLES31.functional.texture.border_clamp.formats.depth24_stencil8_sample_stencil.nearest_size_npot,Fail
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dEQP-GLES31.functional.texture.border_clamp.formats.depth24_stencil8_sample_stencil.nearest_size_pot,Fail
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dEQP-GLES31.functional.texture.border_clamp.formats.depth32f_stencil8_sample_depth.nearest_size_pot,Fail
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dEQP-GLES31.functional.texture.border_clamp.formats.depth32f_stencil8_sample_stencil.nearest_size_npot,Fail
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dEQP-GLES31.functional.texture.border_clamp.formats.depth32f_stencil8_sample_stencil.nearest_size_pot,Fail
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dEQP-GLES31.functional.texture.border_clamp.formats.depth_component24.gather_size_npot,Fail
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@ -948,10 +948,11 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data)
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nir_src_as_uint(intr->src[0]) == 0 &&
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nir_dest_bit_size(intr->dest) == 64 &&
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nir_intrinsic_align_offset(intr) % 8 != 0;
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nir_instr_rewrite_src_ssa(instr, &intr->src[1], nir_udiv_imm(b, intr->src[1].ssa,
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(force_2x32 ? 32 : nir_dest_bit_size(intr->dest)) / 8));
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force_2x32 |= nir_dest_bit_size(intr->dest) == 64 && !has_int64;
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nir_ssa_def *offset = nir_udiv_imm(b, intr->src[1].ssa, (force_2x32 ? 32 : nir_dest_bit_size(intr->dest)) / 8);
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nir_instr_rewrite_src_ssa(instr, &intr->src[1], offset);
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/* if 64bit isn't supported, 64bit loads definitely aren't supported, so rewrite as 2x32 with cast and pray */
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if (force_2x32 || (nir_dest_bit_size(intr->dest) == 64 && !has_int64)) {
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if (force_2x32) {
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/* this is always scalarized */
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assert(intr->dest.ssa.num_components == 1);
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/* rewrite as 2x32 */
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@ -972,9 +973,11 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data)
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}
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case nir_intrinsic_load_shared:
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b->cursor = nir_before_instr(instr);
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nir_instr_rewrite_src_ssa(instr, &intr->src[0], nir_udiv_imm(b, intr->src[0].ssa, nir_dest_bit_size(intr->dest) / 8));
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bool force_2x32 = nir_dest_bit_size(intr->dest) == 64 && !has_int64;
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nir_ssa_def *offset = nir_udiv_imm(b, intr->src[0].ssa, (force_2x32 ? 32 : nir_dest_bit_size(intr->dest)) / 8);
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nir_instr_rewrite_src_ssa(instr, &intr->src[0], offset);
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/* if 64bit isn't supported, 64bit loads definitely aren't supported, so rewrite as 2x32 with cast and pray */
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if (nir_dest_bit_size(intr->dest) == 64 && !has_int64) {
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if (force_2x32) {
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/* this is always scalarized */
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assert(intr->dest.ssa.num_components == 1);
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/* rewrite as 2x32 */
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@ -988,11 +991,13 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data)
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return true;
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}
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break;
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case nir_intrinsic_store_ssbo:
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case nir_intrinsic_store_ssbo: {
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b->cursor = nir_before_instr(instr);
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nir_instr_rewrite_src_ssa(instr, &intr->src[2], nir_udiv_imm(b, intr->src[2].ssa, nir_src_bit_size(intr->src[0]) / 8));
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bool force_2x32 = nir_src_bit_size(intr->src[0]) == 64 && !has_int64;
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nir_ssa_def *offset = nir_udiv_imm(b, intr->src[2].ssa, (force_2x32 ? 32 : nir_src_bit_size(intr->src[0])) / 8);
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nir_instr_rewrite_src_ssa(instr, &intr->src[2], offset);
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/* if 64bit isn't supported, 64bit loads definitely aren't supported, so rewrite as 2x32 with cast and pray */
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if (nir_src_bit_size(intr->src[0]) == 64 && !has_int64) {
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if (force_2x32) {
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/* this is always scalarized */
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assert(intr->src[0].ssa->num_components == 1);
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nir_ssa_def *vals[2] = {nir_unpack_64_2x32_split_x(b, intr->src[0].ssa), nir_unpack_64_2x32_split_y(b, intr->src[0].ssa)};
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@ -1001,9 +1006,12 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data)
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nir_instr_remove(instr);
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}
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return true;
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case nir_intrinsic_store_shared:
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}
|
||||
case nir_intrinsic_store_shared: {
|
||||
b->cursor = nir_before_instr(instr);
|
||||
nir_instr_rewrite_src_ssa(instr, &intr->src[1], nir_udiv_imm(b, intr->src[1].ssa, nir_src_bit_size(intr->src[0]) / 8));
|
||||
bool force_2x32 = nir_src_bit_size(intr->src[0]) == 64 && !has_int64;
|
||||
nir_ssa_def *offset = nir_udiv_imm(b, intr->src[1].ssa, (force_2x32 ? 32 : nir_src_bit_size(intr->src[0])) / 8);
|
||||
nir_instr_rewrite_src_ssa(instr, &intr->src[1], offset);
|
||||
/* if 64bit isn't supported, 64bit loads definitely aren't supported, so rewrite as 2x32 with cast and pray */
|
||||
if (nir_src_bit_size(intr->src[0]) == 64 && !has_int64) {
|
||||
/* this is always scalarized */
|
||||
|
@ -1014,6 +1022,7 @@ rewrite_bo_access_instr(nir_builder *b, nir_instr *instr, void *data)
|
|||
nir_instr_remove(instr);
|
||||
}
|
||||
return true;
|
||||
}
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue