From bb0415b69710ca5759c30f849e13be2f2d927742 Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Thu, 13 May 2021 15:31:56 +0100 Subject: [PATCH] nir: allow 16-bit fsin_amd/fcos_amd Signed-off-by: Rhys Perry Reviewed-by: Alyssa Rosenzweig Reviewed-by: Samuel Pitoiset Part-of: --- src/compiler/nir/nir_opcodes.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py index 0afb86f0e8f..dded4a6a635 100644 --- a/src/compiler/nir/nir_opcodes.py +++ b/src/compiler/nir/nir_opcodes.py @@ -1264,8 +1264,8 @@ unop_horiz("cube_r600", 4, tfloat32, 3, tfloat32, """ # r600/gcn specific sin and cos # these trigeometric functions need some lowering because the supported # input values are expected to be normalized by dividing by (2 * pi) -unop("fsin_amd", tfloat32, "sinf(6.2831853 * src0)") -unop("fcos_amd", tfloat32, "cosf(6.2831853 * src0)") +unop("fsin_amd", tfloat, "sinf(6.2831853 * src0)") +unop("fcos_amd", tfloat, "cosf(6.2831853 * src0)") # AGX specific sin with input expressed in quadrants. Used in the lowering for # fsin/fcos. This corresponds to a sequence of 3 ALU ops in the backend (where