diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 18e94d3a92a..26ee4c4452e 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -540,7 +540,6 @@ isl_calc_phys_level0_extent_sa(const struct isl_device *dev,
       assert(info->height == 1);
       assert(info->depth == 1);
       assert(info->samples == 1);
-      assert(!isl_format_is_compressed(info->format));
 
       switch (dim_layout) {
       case ISL_DIM_LAYOUT_GEN4_3D:
@@ -549,8 +548,8 @@ isl_calc_phys_level0_extent_sa(const struct isl_device *dev,
       case ISL_DIM_LAYOUT_GEN9_1D:
       case ISL_DIM_LAYOUT_GEN4_2D:
          *phys_level0_sa = (struct isl_extent4d) {
-            .w = info->width,
-            .h = 1,
+            .w = isl_align_npot(info->width, fmtl->bw),
+            .h = fmtl->bh,
             .d = 1,
             .a = info->array_len,
          };
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index 1a1a8191b88..0dfeeaf9044 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -243,6 +243,15 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
       assert(isl_format_supports_rendering(dev->info, info->view->format));
    else if (info->view->usage & ISL_SURF_USAGE_TEXTURE_BIT)
       assert(isl_format_supports_sampling(dev->info, info->view->format));
+
+   /* From the Sky Lake PRM Vol. 2d, RENDER_SURFACE_STATE::SurfaceFormat
+    *
+    *    This field cannot be a compressed (BC*, DXT*, FXT*, ETC*, EAC*)
+    *    format if the Surface Type is SURFTYPE_1D
+    */
+   if (info->surf->dim == ISL_SURF_DIM_1D)
+      assert(!isl_format_is_compressed(info->view->format));
+
    s.SurfaceFormat = info->view->format;
 
 #if GEN_IS_HASWELL