From baa9268eb68500e66c3d151f7c97da354552fa91 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 18 Aug 2020 09:26:48 +0200 Subject: [PATCH] aco: add TBA/TMA/TTMP0-11 physical registers definitions MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The TBA/TMA scalar registers are only available on GFX6-GFX8. On GFX9+, TBA/TMA addr are stored in hardware registers and the number of TTMP scalar registers is thus increased by 4. Just keep in mind that tba_lo is actually ttmp0. Best would be to support ttmp registers in RA but that's more complicated. Signed-off-by: Samuel Pitoiset Reviewed-by: Daniel Schürmann Part-of: --- src/amd/compiler/aco_ir.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h index 0e5b69a7863..00a2e2596a3 100644 --- a/src/amd/compiler/aco_ir.h +++ b/src/amd/compiler/aco_ir.h @@ -380,6 +380,20 @@ struct PhysReg { static constexpr PhysReg m0{124}; static constexpr PhysReg vcc{106}; static constexpr PhysReg vcc_hi{107}; +static constexpr PhysReg tba{108}; /* GFX6-GFX8 */ +static constexpr PhysReg tma{110}; /* GFX6-GFX8 */ +static constexpr PhysReg ttmp0{112}; +static constexpr PhysReg ttmp1{113}; +static constexpr PhysReg ttmp2{114}; +static constexpr PhysReg ttmp3{115}; +static constexpr PhysReg ttmp4{116}; +static constexpr PhysReg ttmp5{117}; +static constexpr PhysReg ttmp6{118}; +static constexpr PhysReg ttmp7{119}; +static constexpr PhysReg ttmp8{120}; +static constexpr PhysReg ttmp9{121}; +static constexpr PhysReg ttmp10{122}; +static constexpr PhysReg ttmp11{123}; static constexpr PhysReg sgpr_null{125}; /* GFX10+ */ static constexpr PhysReg exec{126}; static constexpr PhysReg exec_lo{126};