i965/fs: add PACK opcode
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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@ -1013,6 +1013,15 @@ enum opcode {
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*/
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SHADER_OPCODE_LOAD_PAYLOAD,
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/**
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* Packs a number of sources into a single value. Unlike LOAD_PAYLOAD, this
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* acts intra-channel, obtaining the final value for each channel by
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* combining the sources values for the same channel, the first source
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* occupying the lowest bits and the last source occupying the highest
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* bits.
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*/
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FS_OPCODE_PACK,
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SHADER_OPCODE_SHADER_TIME_ADD,
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/**
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@ -4523,7 +4523,8 @@ get_lowered_simd_width(const struct brw_device_info *devinfo,
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case SHADER_OPCODE_INT_QUOTIENT:
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case SHADER_OPCODE_INT_REMAINDER:
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case SHADER_OPCODE_SIN:
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case SHADER_OPCODE_COS: {
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case SHADER_OPCODE_COS:
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case FS_OPCODE_PACK: {
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/* According to the PRMs:
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* "A. In Direct Addressing mode, a source cannot span more than 2
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* adjacent GRF registers.
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@ -550,6 +550,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
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switch (inst->opcode) {
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case BRW_OPCODE_MOV:
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case SHADER_OPCODE_LOAD_PAYLOAD:
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case FS_OPCODE_PACK:
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inst->src[i] = val;
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progress = true;
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break;
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@ -81,6 +81,7 @@ is_expression(const fs_visitor *v, const fs_inst *const inst)
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case SHADER_OPCODE_EXTRACT_BYTE:
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case SHADER_OPCODE_EXTRACT_WORD:
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case SHADER_OPCODE_MOV_INDIRECT:
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case FS_OPCODE_PACK:
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return true;
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case SHADER_OPCODE_RCP:
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case SHADER_OPCODE_RSQ:
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@ -289,6 +289,8 @@ brw_instruction_name(const struct brw_device_info *devinfo, enum opcode op)
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case SHADER_OPCODE_LOAD_PAYLOAD:
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return "load_payload";
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case FS_OPCODE_PACK:
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return "pack";
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case SHADER_OPCODE_GEN4_SCRATCH_READ:
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return "gen4_scratch_read";
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