pan/mdg: Eliminate load_64
It can always be inferred from the types. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
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@ -164,9 +164,6 @@ typedef struct midgard_instruction {
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unsigned nr_dependencies;
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BITSET_WORD *dependents;
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/* For load/store ops.. force 64-bit destination */
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bool load_64;
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union {
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midgard_load_store_word load_store;
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midgard_vector_alu alu;
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@ -1135,9 +1135,7 @@ mir_set_intr_mask(nir_instr *instr, midgard_instruction *ins, bool is_read)
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/* Once we have the NIR mask, we need to normalize to work in 32-bit space */
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unsigned bytemask = pan_to_bytemask(dsize, nir_mask);
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mir_set_bytemask(ins, bytemask);
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if (dsize == 64)
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ins->load_64 = true;
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ins->dest_type = nir_type_uint | dsize;
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}
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/* Uniforms and UBOs use a shared code path, as uniforms are just (slightly
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@ -525,9 +525,6 @@ allocate_registers(compiler_context *ctx, bool *spilled)
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(size == 64) ? 3 : /* (1 << 3) = 8-byte */
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3; /* 8-bit todo */
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if (ins->type == TAG_LOAD_STORE_4 && ins->load_64)
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min_alignment[dest] = 3;
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/* We don't have a swizzle for the conditional and we don't
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* want to muck with the conditional itself, so just force
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* alignment for now */
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@ -192,12 +192,12 @@ midgard_promote_uniforms(compiler_context *ctx)
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needs_move |= BITSET_TEST(special, ins->dest);
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if (needs_move) {
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unsigned type_size = nir_alu_type_get_type_size(ins->dest_type);
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midgard_instruction mov = v_mov(promoted, ins->dest);
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if (ins->load_64)
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if (type_size == 64)
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mov.alu.reg_mode = midgard_reg_mode_64;
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unsigned type_size = nir_alu_type_get_type_size(ins->dest_type);
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uint16_t rounded = mir_round_bytemask_up(mir_bytemask(ins), type_size);
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mir_set_bytemask(&mov, rounded);
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mir_insert_instruction_before(ctx, ins, mov);
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