gallivm: Allow to conversions to/from registers of different sizes.
Allow for example to convert from 4 x float32 to 4 x unorm8 and vice versa. Uses code and ideas from Brian Paul.
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a70ec096aa
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@ -83,6 +83,9 @@
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*
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* Although the result values can be scaled to an arbitrary bit width specified
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* by dst_width, the actual result type will have the same width.
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*
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* Ex: src = { float, float, float, float }
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* return { i32, i32, i32, i32 } where each value is in [0, 2^dst_width-1].
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*/
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LLVMValueRef
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lp_build_clamped_float_to_unsigned_norm(LLVMBuilderRef builder,
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@ -152,6 +155,8 @@ lp_build_clamped_float_to_unsigned_norm(LLVMBuilderRef builder,
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/**
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* Inverse of lp_build_clamped_float_to_unsigned_norm above.
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* Ex: src = { i32, i32, i32, i32 } with values in range [0, 2^src_width-1]
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* return {float, float, float, float} with values in range [0, 1].
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*/
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LLVMValueRef
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lp_build_unsigned_norm_to_float(LLVMBuilderRef builder,
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@ -219,14 +224,13 @@ lp_build_conv(LLVMBuilderRef builder,
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unsigned num_tmps;
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unsigned i;
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/* Register width must remain constant */
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assert(src_type.width * src_type.length == dst_type.width * dst_type.length);
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/* We must not loose or gain channels. Only precision */
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assert(src_type.length * num_srcs == dst_type.length * num_dsts);
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assert(src_type.length <= LP_MAX_VECTOR_LENGTH);
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assert(dst_type.length <= LP_MAX_VECTOR_LENGTH);
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assert(num_srcs <= LP_MAX_VECTOR_LENGTH);
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assert(num_dsts <= LP_MAX_VECTOR_LENGTH);
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tmp_type = src_type;
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for(i = 0; i < num_srcs; ++i)
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@ -330,25 +334,11 @@ lp_build_conv(LLVMBuilderRef builder,
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assert(!tmp_type.floating || tmp_type.width == dst_type.width);
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if(tmp_type.width > dst_type.width) {
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assert(num_dsts == 1);
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tmp[0] = lp_build_pack(builder, tmp_type, dst_type, TRUE, tmp, num_tmps);
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tmp_type.width = dst_type.width;
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tmp_type.length = dst_type.length;
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num_tmps = 1;
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}
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lp_build_resize(builder, tmp_type, dst_type, tmp, num_srcs, tmp, num_dsts);
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if(tmp_type.width < dst_type.width) {
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assert(num_tmps == 1);
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lp_build_unpack(builder, tmp_type, dst_type, tmp[0], tmp, num_dsts);
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tmp_type.width = dst_type.width;
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tmp_type.length = dst_type.length;
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num_tmps = num_dsts;
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}
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assert(tmp_type.width == dst_type.width);
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assert(tmp_type.length == dst_type.length);
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assert(num_tmps == num_dsts);
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tmp_type.width = dst_type.width;
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tmp_type.length = dst_type.length;
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num_tmps = num_dsts;
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/*
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* Scale to the widest range
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@ -427,3 +427,109 @@ lp_build_pack(LLVMBuilderRef builder,
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return tmp[0];
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}
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/**
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* Truncate or expand the bitwidth
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*/
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void
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lp_build_resize(LLVMBuilderRef builder,
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struct lp_type src_type,
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struct lp_type dst_type,
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const LLVMValueRef *src, unsigned num_srcs,
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LLVMValueRef *dst, unsigned num_dsts)
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{
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LLVMValueRef tmp[LP_MAX_VECTOR_LENGTH];
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unsigned i;
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assert(!src_type.floating || src_type.width == dst_type.width);
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/* We must not loose or gain channels. Only precision */
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assert(src_type.length * num_srcs == dst_type.length * num_dsts);
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/* We don't support M:N conversion, only 1:N, M:1, or 1:1 */
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assert(num_srcs == 1 || num_dsts == 1);
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assert(src_type.length <= LP_MAX_VECTOR_LENGTH);
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assert(dst_type.length <= LP_MAX_VECTOR_LENGTH);
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assert(num_srcs <= LP_MAX_VECTOR_LENGTH);
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assert(num_dsts <= LP_MAX_VECTOR_LENGTH);
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if (src_type.width > dst_type.width) {
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/*
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* Truncate bit width.
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*/
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assert(num_dsts == 1);
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if (src_type.width * src_type.length == dst_type.width * dst_type.length) {
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/*
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* Register width remains constant -- use vector packing intrinsics
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*/
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tmp[0] = lp_build_pack(builder, src_type, dst_type, TRUE, src, num_srcs);
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}
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else {
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/*
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* Do it element-wise.
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*/
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assert(src_type.length == dst_type.length);
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tmp[0] = lp_build_undef(dst_type);
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for (i = 0; i < dst_type.length; ++i) {
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LLVMValueRef index = LLVMConstInt(LLVMInt32Type(), i, 0);
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LLVMValueRef val = LLVMBuildExtractElement(builder, src[0], index, "");
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val = LLVMBuildTrunc(builder, val, lp_build_elem_type(dst_type), "");
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tmp[0] = LLVMBuildInsertElement(builder, tmp[0], val, index, "");
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}
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}
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}
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else if (src_type.width < dst_type.width) {
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/*
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* Expand bit width.
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*/
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assert(num_srcs == 1);
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if (src_type.width * src_type.length == dst_type.width * dst_type.length) {
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/*
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* Register width remains constant -- use vector unpack intrinsics
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*/
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lp_build_unpack(builder, src_type, dst_type, src[0], tmp, num_dsts);
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}
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else {
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/*
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* Do it element-wise.
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*/
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assert(src_type.length == dst_type.length);
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tmp[0] = lp_build_undef(dst_type);
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for (i = 0; i < dst_type.length; ++i) {
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LLVMValueRef index = LLVMConstInt(LLVMInt32Type(), i, 0);
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LLVMValueRef val = LLVMBuildExtractElement(builder, src[0], index, "");
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if (src_type.sign && dst_type.sign) {
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val = LLVMBuildSExt(builder, val, lp_build_elem_type(dst_type), "");
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} else {
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val = LLVMBuildZExt(builder, val, lp_build_elem_type(dst_type), "");
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}
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tmp[0] = LLVMBuildInsertElement(builder, tmp[0], val, index, "");
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}
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}
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}
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else {
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/*
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* No-op
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*/
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assert(num_srcs == 1);
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assert(num_dsts == 1);
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tmp[0] = src[0];
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}
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for(i = 0; i < num_dsts; ++i)
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dst[i] = tmp[i];
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}
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@ -92,4 +92,12 @@ lp_build_pack(LLVMBuilderRef builder,
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const LLVMValueRef *src, unsigned num_srcs);
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void
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lp_build_resize(LLVMBuilderRef builder,
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struct lp_type src_type,
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struct lp_type dst_type,
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const LLVMValueRef *src, unsigned num_srcs,
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LLVMValueRef *dst, unsigned num_dsts);
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#endif /* !LP_BLD_PACK_H */
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@ -167,19 +167,26 @@ test_one(unsigned verbose,
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unsigned i, j;
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void *code;
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if (src_type.width * src_type.length != dst_type.width * dst_type.length ||
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src_type.length != dst_type.length) {
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return TRUE;
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}
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if(verbose >= 1)
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dump_conv_types(stdout, src_type, dst_type);
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if(src_type.length > dst_type.length) {
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if (src_type.length > dst_type.length) {
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num_srcs = 1;
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num_dsts = src_type.length/dst_type.length;
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}
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else {
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else if (src_type.length < dst_type.length) {
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num_dsts = 1;
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num_srcs = dst_type.length/src_type.length;
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}
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assert(src_type.width * src_type.length == dst_type.width * dst_type.length);
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else {
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num_dsts = 1;
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num_srcs = 1;
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}
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/* We must not loose or gain channels. Only precision */
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assert(src_type.length * num_srcs == dst_type.length * num_dsts);
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@ -381,6 +388,11 @@ const struct lp_type conv_types[] = {
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{ FALSE, FALSE, TRUE, FALSE, 8, 16 },
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{ FALSE, FALSE, FALSE, TRUE, 8, 16 },
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{ FALSE, FALSE, FALSE, FALSE, 8, 16 },
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{ FALSE, FALSE, TRUE, TRUE, 8, 4 },
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{ FALSE, FALSE, TRUE, FALSE, 8, 4 },
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{ FALSE, FALSE, FALSE, TRUE, 8, 4 },
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{ FALSE, FALSE, FALSE, FALSE, 8, 4 },
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};
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