intel/isl: Add support to emit clear value address.

gen10 can emit the clear color by setting it on a buffer somewhere, and
then adding only the address to the surface state.

This commit add support for that on isl_surf_fill_state, and if that is
requested, skip setting the clear value itself.

v2: Add assert to make sure we are at least on gen10.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Rafael Antognolli 2017-08-10 09:29:51 -07:00
parent 94675edcfd
commit b8f45cf967
2 changed files with 23 additions and 4 deletions

View File

@ -1307,6 +1307,15 @@ struct isl_surf_fill_state_info {
*/
union isl_color_value clear_color;
/**
* Send only the clear value address
*
* If set, we only pass the clear address to the GPU and it will fetch it
* from wherever it is.
*/
bool use_clear_address;
uint64_t clear_address;
/**
* Surface write disables for gen4-5
*/

View File

@ -637,11 +637,21 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
#endif
if (info->aux_usage != ISL_AUX_USAGE_NONE) {
if (info->use_clear_address) {
#if GEN_GEN >= 10
s.ClearValueAddressEnable = true;
s.ClearValueAddress = info->clear_address;
#else
unreachable("Gen9 and earlier do not support indirect clear colors");
#endif
}
#if GEN_GEN >= 9
s.RedClearColor = info->clear_color.u32[0];
s.GreenClearColor = info->clear_color.u32[1];
s.BlueClearColor = info->clear_color.u32[2];
s.AlphaClearColor = info->clear_color.u32[3];
if (!info->use_clear_address) {
s.RedClearColor = info->clear_color.u32[0];
s.GreenClearColor = info->clear_color.u32[1];
s.BlueClearColor = info->clear_color.u32[2];
s.AlphaClearColor = info->clear_color.u32[3];
}
#elif GEN_GEN >= 7
/* Prior to Sky Lake, we only have one bit for the clear color which
* gives us 0 or 1 in whatever the surface's format happens to be.