winsys/radeon: add command stream replay dump for faulty lockup v3
Build time option, set RADEON_CS_DUMP_ON_LOCKUP to 1 in radeon_drm_cs.h to enable it. When enabled after each cs submission the code will try to detect lockup by waiting on one of the buffer of the cs to become idle, after a timeout it will consider that the cs triggered a lockup and will write a radeon_lockup.c file in current directory that have all information for replaying the cs. To build this file : gcc -O0 -g radeon_lockup.c -ldrm -o radeon_lockup -I/usr/include/libdrm v2: Add radeon_ctx.h file to mesa git tree v3: Slightly improve dumped file for easier editing, only dump first faulty cs Signed-off-by: Jerome Glisse <jglisse@redhat.com>
This commit is contained in:
parent
5192262833
commit
b8998f976e
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@ -1,4 +1,5 @@
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C_SOURCES := \
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radeon_drm_bo.c \
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radeon_drm_cs.c \
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radeon_drm_cs_dump.c \
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radeon_drm_winsys.c
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@ -396,14 +396,54 @@ static void radeon_bo_destroy(struct pb_buffer *_buf)
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FREE(bo);
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}
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void *radeon_bo_do_map(struct radeon_bo *bo)
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{
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struct drm_radeon_gem_mmap args = {0};
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void *ptr;
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/* Return the pointer if it's already mapped. */
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if (bo->ptr)
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return bo->ptr;
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/* Map the buffer. */
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pipe_mutex_lock(bo->map_mutex);
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/* Return the pointer if it's already mapped (in case of a race). */
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if (bo->ptr) {
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pipe_mutex_unlock(bo->map_mutex);
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return bo->ptr;
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}
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args.handle = bo->handle;
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args.offset = 0;
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args.size = (uint64_t)bo->base.size;
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if (drmCommandWriteRead(bo->rws->fd,
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DRM_RADEON_GEM_MMAP,
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&args,
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sizeof(args))) {
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pipe_mutex_unlock(bo->map_mutex);
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fprintf(stderr, "radeon: gem_mmap failed: %p 0x%08X\n",
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bo, bo->handle);
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return NULL;
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}
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ptr = os_mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED,
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bo->rws->fd, args.addr_ptr);
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if (ptr == MAP_FAILED) {
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pipe_mutex_unlock(bo->map_mutex);
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fprintf(stderr, "radeon: mmap failed, errno: %i\n", errno);
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return NULL;
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}
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bo->ptr = ptr;
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pipe_mutex_unlock(bo->map_mutex);
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return bo->ptr;
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}
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static void *radeon_bo_map(struct radeon_winsys_cs_handle *buf,
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struct radeon_winsys_cs *rcs,
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enum pipe_transfer_usage usage)
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{
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struct radeon_bo *bo = (struct radeon_bo*)buf;
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struct radeon_drm_cs *cs = (struct radeon_drm_cs*)rcs;
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struct drm_radeon_gem_mmap args = {0};
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void *ptr;
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/* If it's not unsynchronized bo_map, flush CS if needed and then wait. */
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if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) {
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@ -466,41 +506,7 @@ static void *radeon_bo_map(struct radeon_winsys_cs_handle *buf,
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}
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}
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/* Return the pointer if it's already mapped. */
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if (bo->ptr)
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return bo->ptr;
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/* Map the buffer. */
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pipe_mutex_lock(bo->map_mutex);
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/* Return the pointer if it's already mapped (in case of a race). */
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if (bo->ptr) {
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pipe_mutex_unlock(bo->map_mutex);
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return bo->ptr;
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}
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args.handle = bo->handle;
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args.offset = 0;
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args.size = (uint64_t)bo->base.size;
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if (drmCommandWriteRead(bo->rws->fd,
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DRM_RADEON_GEM_MMAP,
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&args,
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sizeof(args))) {
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pipe_mutex_unlock(bo->map_mutex);
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fprintf(stderr, "radeon: gem_mmap failed: %p 0x%08X\n",
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bo, bo->handle);
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return NULL;
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}
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ptr = os_mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED,
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bo->rws->fd, args.addr_ptr);
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if (ptr == MAP_FAILED) {
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pipe_mutex_unlock(bo->map_mutex);
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fprintf(stderr, "radeon: mmap failed, errno: %i\n", errno);
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return NULL;
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}
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bo->ptr = ptr;
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pipe_mutex_unlock(bo->map_mutex);
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return bo->ptr;
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return radeon_bo_do_map(bo);
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}
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static void radeon_bo_unmap(struct radeon_winsys_cs_handle *_buf)
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@ -79,4 +79,6 @@ void radeon_bo_reference(struct radeon_bo **dst, struct radeon_bo *src)
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pb_reference((struct pb_buffer**)dst, (struct pb_buffer*)src);
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}
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void *radeon_bo_do_map(struct radeon_bo *bo);
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#endif
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@ -428,6 +428,10 @@ void radeon_drm_cs_emit_ioctl_oneshot(struct radeon_cs_context *csc)
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}
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}
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#if RADEON_CS_DUMP_ON_LOCKUP
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radeon_dump_cs_on_lockup(csc);
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#endif
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for (i = 0; i < csc->crelocs; i++)
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p_atomic_dec(&csc->relocs_bo[i]->num_active_ioctls);
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@ -30,6 +30,8 @@
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#include "radeon_drm_bo.h"
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#include <radeon_drm.h>
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#define RADEON_CS_DUMP_ON_LOCKUP 0
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struct radeon_cs_context {
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uint32_t buf[RADEON_MAX_CMDBUF_DWORDS];
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@ -121,4 +123,8 @@ void radeon_drm_cs_sync_flush(struct radeon_winsys_cs *rcs);
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void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws);
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void radeon_drm_cs_emit_ioctl_oneshot(struct radeon_cs_context *csc);
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#if RADEON_CS_DUMP_ON_LOCKUP
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void radeon_dump_cs_on_lockup(struct radeon_cs_context *csc);
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#endif
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#endif
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@ -0,0 +1,152 @@
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/*
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* Copyright © 2013 Jérôme Glisse
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*/
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/*
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* Authors:
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* Jérôme Glisse <jglisse@redhat.com>
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <xf86drm.h>
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#include "radeon_drm_cs.h"
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#include "radeon_drm_bo.h"
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#if RADEON_CS_DUMP_ON_LOCKUP
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static bool dumped = false;
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void radeon_dump_cs_on_lockup(struct radeon_cs_context *csc)
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{
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struct drm_radeon_gem_busy args;
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FILE *dump;
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unsigned i, lockup;
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uint32_t *ptr;
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/* only dump the first cs to cause a lockup */
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if (!csc->crelocs || dumped) {
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/* can not determine if there was a lockup if no bo were use by
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* the cs and most likely in such case no lockup occurs
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*/
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return;
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}
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memset(&args, 0, sizeof(args));
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args.handle = csc->relocs_bo[0]->handle;
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for (i = 0; i < 10; i++) {
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usleep(5);
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lockup = drmCommandWriteRead(csc->fd, DRM_RADEON_GEM_BUSY, &args, sizeof(args));
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if (!lockup) {
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break;
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}
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}
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if (!lockup || i < 10) {
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return;
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}
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/* ok we are most likely facing a lockup write the standalone replay file */
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dump = fopen("radeon_lockup.c", "w");
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if (dump == NULL) {
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return;
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}
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fprintf(dump, "/* To build this file you will need to copy radeon_ctx.h\n");
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fprintf(dump, " * in same directory. You can find radeon_ctx.h in mesa tree :\n");
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fprintf(dump, " * mesa/src/gallium/winsys/radeon/tools/radeon_ctx.h\n");
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fprintf(dump, " * Build with :\n");
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fprintf(dump, " * gcc -O0 -g radeon_lockup.c -ldrm -o radeon_lockup -I/usr/include/libdrm\n");
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fprintf(dump, " */\n");
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fprintf(dump, "#include <stdio.h>\n");
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fprintf(dump, "#include <stdint.h>\n");
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fprintf(dump, "#include \"radeon_ctx.h\"\n");
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fprintf(dump, "\n");
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fprintf(dump, "#define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))\n");
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fprintf(dump, "\n");
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for (i = 0; i < csc->crelocs; i++) {
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unsigned j, ndw = (csc->relocs_bo[i]->base.size + 3) >> 2;
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ptr = radeon_bo_do_map(csc->relocs_bo[i]);
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if (ptr) {
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fprintf(dump, "static uint32_t bo_%04d_data[%d] = {\n ", i, ndw);
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for (j = 0; j < ndw; j++) {
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if (j && !(j % 8)) {
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uint32_t offset = (j - 8) << 2;
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fprintf(dump, " /* [0x%08x] va[0x%016lx] */\n ", offset, offset + csc->relocs_bo[i]->va);
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}
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fprintf(dump, " 0x%08x,", ptr[j]);
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}
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fprintf(dump, "};\n\n");
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}
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}
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fprintf(dump, "static uint32_t bo_relocs[%d] = {\n", csc->crelocs * 4);
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for (i = 0; i < csc->crelocs; i++) {
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fprintf(dump, " 0x%08x, 0x%08x, 0x%08x, 0x%08x,\n",
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0, csc->relocs[i].read_domains, csc->relocs[i].write_domain, csc->relocs[i].flags);
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}
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fprintf(dump, "};\n\n");
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fprintf(dump, "static uint32_t cs[] = {\n");
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ptr = csc->buf;
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for (i = 0; i < csc->chunks[0].length_dw; i++) {
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fprintf(dump, " 0x%08x,\n", ptr[i]);
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}
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fprintf(dump, "};\n\n");
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fprintf(dump, "static uint32_t cs_flags[2] = {\n");
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fprintf(dump, " 0x%08x,\n", csc->flags[0]);
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fprintf(dump, " 0x%08x,\n", csc->flags[1]);
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fprintf(dump, "};\n\n");
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fprintf(dump, "int main(int argc, char *argv[])\n");
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fprintf(dump, "{\n");
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fprintf(dump, " struct bo *bo[%d];\n", csc->crelocs);
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fprintf(dump, " struct ctx ctx;\n");
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fprintf(dump, "\n");
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fprintf(dump, " ctx_init(&ctx);\n");
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fprintf(dump, "\n");
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for (i = 0; i < csc->crelocs; i++) {
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unsigned ndw = (csc->relocs_bo[i]->base.size + 3) >> 2;
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uint32_t *ptr;
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ptr = radeon_bo_do_map(csc->relocs_bo[i]);
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if (ptr) {
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fprintf(dump, " bo[%d] = bo_new(&ctx, %d, bo_%04d_data, 0x%016lx, 0x%08x);\n",
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i, ndw, i, csc->relocs_bo[i]->va, csc->relocs_bo[i]->base.alignment);
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} else {
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fprintf(dump, " bo[%d] = bo_new(&ctx, %d, NULL, 0x%016lx, 0x%08x);\n",
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i, ndw, csc->relocs_bo[i]->va, csc->relocs_bo[i]->base.alignment);
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}
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}
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fprintf(dump, "\n");
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fprintf(dump, " ctx_cs(&ctx, cs, cs_flags, ARRAY_SIZE(cs), bo, bo_relocs, %d);\n", csc->crelocs);
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fprintf(dump, "\n");
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fprintf(dump, " fprintf(stderr, \"waiting for cs execution to end ....\\n\");\n");
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fprintf(dump, " bo_wait(&ctx, bo[0]);\n");
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fprintf(dump, "}\n");
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fclose(dump);
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dumped = true;
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}
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#endif
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@ -0,0 +1,235 @@
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/*
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* Copyright 2011 Jerome Glisse <glisse@freedesktop.org>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
|
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Jérôme Glisse
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*/
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#ifndef RADEON_CTX_H
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#define RADEON_CTX_H
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#define _FILE_OFFSET_BITS 64
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#include <sys/mman.h>
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#include <errno.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <string.h>
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#include "xf86drm.h"
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#include "radeon_drm.h"
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#ifndef RADEON_CHUNK_ID_FLAGS
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#define RADEON_CHUNK_ID_FLAGS 0x03
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/* The first dword of RADEON_CHUNK_ID_FLAGS is a uint32 of these flags: */
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#define RADEON_CS_KEEP_TILING_FLAGS 0x01
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#endif
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#ifndef RADEON_VA_MAP
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#define RADEON_VA_MAP 1
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#define RADEON_VA_UNMAP 2
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#define RADEON_VA_RESULT_OK 0
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#define RADEON_VA_RESULT_ERROR 1
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#define RADEON_VA_RESULT_VA_EXIST 2
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#define RADEON_VM_PAGE_VALID (1 << 0)
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#define RADEON_VM_PAGE_READABLE (1 << 1)
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#define RADEON_VM_PAGE_WRITEABLE (1 << 2)
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#define RADEON_VM_PAGE_SYSTEM (1 << 3)
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#define RADEON_VM_PAGE_SNOOPED (1 << 4)
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struct drm_radeon_gem_va {
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uint32_t handle;
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uint32_t operation;
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uint32_t vm_id;
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uint32_t flags;
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uint64_t offset;
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};
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#define DRM_RADEON_GEM_VA 0x2b
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#endif
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struct ctx {
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int fd;
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};
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struct bo {
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uint32_t handle;
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uint32_t alignment;
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uint64_t size;
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uint64_t va;
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void *ptr;
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};
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static void ctx_init(struct ctx *ctx)
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{
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ctx->fd = drmOpen("radeon", NULL);
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if (ctx->fd < 0) {
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fprintf(stderr, "failed to open radeon drm device file\n");
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exit(-1);
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}
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}
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static void bo_wait(struct ctx *ctx, struct bo *bo)
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{
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struct drm_radeon_gem_wait_idle args;
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void *ptr;
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int r;
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/* Zero out args to make valgrind happy */
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memset(&args, 0, sizeof(args));
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args.handle = bo->handle;
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do {
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r = drmCommandWriteRead(ctx->fd, DRM_RADEON_GEM_WAIT_IDLE, &args, sizeof(args));
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} while (r == -EBUSY);
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}
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static void ctx_cs(struct ctx *ctx, uint32_t *cs, uint32_t cs_flags[2], unsigned ndw,
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struct bo **bo, uint32_t *bo_relocs, unsigned nbo)
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{
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struct drm_radeon_cs args;
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struct drm_radeon_cs_chunk chunks[3];
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uint64_t chunk_array[3];
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unsigned i;
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int r;
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/* update handle */
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for (i = 0; i < nbo; i++) {
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bo_relocs[i*4+0] = bo[i]->handle;
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}
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args.num_chunks = 2;
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if (cs_flags[0] || cs_flags[1]) {
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/* enable RADEON_CHUNK_ID_FLAGS */
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args.num_chunks = 3;
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}
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args.chunks = (uint64_t)(uintptr_t)chunk_array;
|
||||
chunks[0].chunk_id = RADEON_CHUNK_ID_IB;
|
||||
chunks[0].length_dw = ndw;
|
||||
chunks[0].chunk_data = (uintptr_t)cs;
|
||||
chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS;
|
||||
chunks[1].length_dw = nbo * 4;
|
||||
chunks[1].chunk_data = (uintptr_t)bo_relocs;
|
||||
chunks[2].chunk_id = RADEON_CHUNK_ID_FLAGS;
|
||||
chunks[2].length_dw = 2;
|
||||
chunks[2].chunk_data = (uintptr_t)cs_flags;
|
||||
chunk_array[0] = (uintptr_t)&chunks[0];
|
||||
chunk_array[1] = (uintptr_t)&chunks[1];
|
||||
chunk_array[2] = (uintptr_t)&chunks[2];
|
||||
|
||||
fprintf(stderr, "emiting cs %ddw with %d bo\n", ndw, nbo);
|
||||
r = drmCommandWriteRead(ctx->fd, DRM_RADEON_CS, &args, sizeof(args));
|
||||
if (r) {
|
||||
fprintf(stderr, "cs submission failed with %d\n", r);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
static void bo_map(struct ctx *ctx, struct bo *bo)
|
||||
{
|
||||
struct drm_radeon_gem_mmap args;
|
||||
void *ptr;
|
||||
int r;
|
||||
|
||||
/* Zero out args to make valgrind happy */
|
||||
memset(&args, 0, sizeof(args));
|
||||
args.handle = bo->handle;
|
||||
args.offset = 0;
|
||||
args.size = (uint64_t)bo->size;
|
||||
r = drmCommandWriteRead(ctx->fd, DRM_RADEON_GEM_MMAP, &args, sizeof(args));
|
||||
if (r) {
|
||||
fprintf(stderr, "error mapping %p 0x%08X (error = %d)\n", bo, bo->handle, r);
|
||||
exit(-1);
|
||||
}
|
||||
ptr = mmap(0, args.size, PROT_READ|PROT_WRITE, MAP_SHARED, ctx->fd, args.addr_ptr);
|
||||
if (ptr == MAP_FAILED) {
|
||||
fprintf(stderr, "%s failed to map bo\n", __func__);
|
||||
exit(-1);
|
||||
}
|
||||
bo->ptr = ptr;
|
||||
}
|
||||
|
||||
static void bo_va(struct ctx *ctx, struct bo *bo)
|
||||
{
|
||||
struct drm_radeon_gem_va args;
|
||||
int r;
|
||||
|
||||
args.handle = bo->handle;
|
||||
args.vm_id = 0;
|
||||
args.operation = RADEON_VA_MAP;
|
||||
args.flags = RADEON_VM_PAGE_READABLE | RADEON_VM_PAGE_WRITEABLE | RADEON_VM_PAGE_SNOOPED;
|
||||
args.offset = bo->va;
|
||||
r = drmCommandWriteRead(ctx->fd, DRM_RADEON_GEM_VA, &args, sizeof(args));
|
||||
if (r && args.operation == RADEON_VA_RESULT_ERROR) {
|
||||
fprintf(stderr, "radeon: Failed to allocate virtual address for buffer:\n");
|
||||
fprintf(stderr, "radeon: size : %d bytes\n", bo->size);
|
||||
fprintf(stderr, "radeon: alignment : %d bytes\n", bo->alignment);
|
||||
fprintf(stderr, "radeon: va : 0x%016llx\n", (unsigned long long)bo->va);
|
||||
exit(-1);
|
||||
}
|
||||
}
|
||||
|
||||
static struct bo *bo_new(struct ctx *ctx, unsigned ndw, uint32_t *data, uint64_t va, uint32_t alignment)
|
||||
{
|
||||
struct drm_radeon_gem_create args;
|
||||
struct bo *bo;
|
||||
int r;
|
||||
|
||||
bo = calloc(1, sizeof(*bo));
|
||||
if (bo == NULL) {
|
||||
fprintf(stderr, "failed to malloc bo struct\n");
|
||||
exit(-1);
|
||||
}
|
||||
bo->size = ndw * 4ULL;
|
||||
bo->va = va;
|
||||
bo->alignment = alignment;
|
||||
|
||||
args.size = bo->size;
|
||||
args.alignment = bo->alignment;
|
||||
args.initial_domain = RADEON_GEM_DOMAIN_GTT;
|
||||
args.flags = 0;
|
||||
args.handle = 0;
|
||||
|
||||
r = drmCommandWriteRead(ctx->fd, DRM_RADEON_GEM_CREATE, &args, sizeof(args));
|
||||
bo->handle = args.handle;
|
||||
if (r) {
|
||||
fprintf(stderr, "Failed to allocate :\n");
|
||||
fprintf(stderr, " size : %d bytes\n", bo->size);
|
||||
fprintf(stderr, " alignment : %d bytes\n", bo->alignment);
|
||||
free(bo);
|
||||
exit(-1);
|
||||
}
|
||||
|
||||
if (data) {
|
||||
bo_map(ctx, bo);
|
||||
memcpy(bo->ptr, data, bo->size);
|
||||
}
|
||||
|
||||
if (va) {
|
||||
bo_va(ctx, bo);
|
||||
}
|
||||
|
||||
return bo;
|
||||
}
|
||||
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue