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intel/compiler: assert restrictions on conversions to half-float 

There are some hardware restrictions that brw_nir_lower_conversions should
have taken care of before we get here.

v2:
 - rebased on top of regioning lowering pass

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com> (v1)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Iago Toral Quiroga 2018-12-18 09:27:21 +01:00 committed by Juan A. Suarez Romero
parent 66806405af
commit b6a454791b
1 changed files with 3 additions and 2 deletions
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5
src/intel/compiler/brw_fs_nir.cpp
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@ -888,6 +888,9 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
*/
case nir_op_f2f16:
case nir_op_i2f16:
case nir_op_u2f16:
assert(type_sz(op[0].type) < 8); /* brw_nir_lower_conversions */
inst = bld.MOV(result, op[0]);
inst->saturate = instr->dest.saturate;
break;
@ -927,8 +930,6 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
case nir_op_u2u32:
case nir_op_i2i16:
case nir_op_u2u16:
case nir_op_i2f16:
case nir_op_u2f16:
case nir_op_i2i8:
case nir_op_u2u8:
inst = bld.MOV(result, op[0]);