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Merge branch 'mesa_7_7_branch' 

Conflicts:
	src/mesa/drivers/dri/r600/r700_assembler.c
	src/mesa/main/version.h
This commit is contained in:
Andre Maasikas 2009-12-08 11:57:24 +02:00
parent ac66598ed8 0d4a05445c
commit b5e256c76d
29 changed files with 232 additions and 88 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Makefile
View File

@ -182,7 +182,7 @@ ultrix-gcc:
# Rules for making release tarballs
VERSION=7.7-devel
VERSION=7.7-rc2
DIRECTORY = Mesa-$(VERSION)
LIB_NAME = MesaLib-$(VERSION)
DEMO_NAME = MesaDemos-$(VERSION)

17
configure.ac
View File

@ -1143,7 +1143,14 @@ yes)
GALLIUM_STATE_TRACKERS_DIRS=glx
;;
dri)
test "x$enable_egl" = xyes && GALLIUM_STATE_TRACKERS_DIRS=egl
GALLIUM_STATE_TRACKERS_DIRS="dri"
if test "x$enable_egl" = xyes; then
GALLIUM_STATE_TRACKERS_DIRS="$GALLIUM_STATE_TRACKERS_DIRS egl"
fi
# Have only tested st/xorg on 1.6.0 servers
PKG_CHECK_MODULES(XORG, [xorg-server >= 1.6.0],
HAVE_XORG="yes"; GALLIUM_STATE_TRACKERS_DIRS="$GALLIUM_STATE_TRACKERS_DIRS xorg",
HAVE_XORG="no")
;;
esac
;;
@ -1206,13 +1213,15 @@ dnl
dnl Gallium Intel configuration
dnl
AC_ARG_ENABLE([gallium-intel],
[AS_HELP_STRING([--disable-gallium-intel],
[build gallium intel @<:@default=enabled@:>@])],
[AS_HELP_STRING([--enable-gallium-intel],
[build gallium intel @<:@default=disabled@:>@])],
[enable_gallium_intel="$enableval"],
[enable_gallium_intel=yes])
[enable_gallium_intel=auto])
if test "x$enable_gallium_intel" = xyes; then
GALLIUM_WINSYS_DRM_DIRS="$GALLIUM_WINSYS_DRM_DIRS intel"
GALLIUM_DRIVERS_DIRS="$GALLIUM_DRIVERS_DIRS i915"
elif test "x$enable_gallium_intel" = xauto; then
GALLIUM_DRIVERS_DIRS="$GALLIUM_DRIVERS_DIRS i915"
fi
dnl

2
docs/relnotes-7.6.1.html
View File

@ -56,6 +56,8 @@ tbd
<li>Fixed clipping / provoking vertex bugs in i965 driver.
<li>Assorted build fixes for AIX.
<li>Endianness fixes for the DRI swrast driver (bug 22767).</li>
<li>Point sprite fixes for i915/945 driver.
<li>Fixed assorted memory leaks (usually on error paths)
</ul>
<h2>Changes</h2>

1
progs/demos/projtex.c
View File

@ -248,6 +248,7 @@ loadImageTextures(void)
free(texData3);
free(texData4);
free(image);
}
}

1
progs/fp/Makefile
View File

@ -17,6 +17,7 @@ SOURCES = \
tri-depth2.c \
tri-depthwrite.c \
tri-depthwrite2.c \
tri-inv.c \
tri-param.c \
fp-tri.c

2
progs/fp/tri-inv.c
View File

@ -56,7 +56,7 @@ static void Key(unsigned char key, int x, int y)
case 27:
exit(1);
default:
return;
break;
}
glutPostRedisplay();

2
progs/samples/Makefile
View File

@ -10,7 +10,7 @@ LIB_DEP = $(TOP)/$(LIB_DIR)/$(GL_LIB_NAME) $(TOP)/$(LIB_DIR)/$(GLU_LIB_NAME) $(T
LIBS = -L$(TOP)/$(LIB_DIR) -l$(GLUT_LIB) -l$(GLEW_LIB) -l$(GLU_LIB) -l$(GL_LIB) $(APP_LIB_DEPS)
PROGS = accum bitmap1 bitmap2 blendeq blendxor copy cursor depth eval fog \
font line logo nurb olympic overlay point prim quad select \
font line logo nurb olympic overlay point prim rgbtoppm quad select \
shape sphere star stencil stretch texture tri wave

4
progs/samples/rgbtoppm.c
View File

@ -86,7 +86,8 @@ static ImageRec *ImageOpen(char *fileName)
exit(1);
}
if ((image->file = fopen(fileName, "rb")) == NULL) {
return NULL;
free(image);
return NULL;
}
fread(image, 1, 12, image->file);
@ -224,6 +225,7 @@ read_rgb_texture(char *name, int *width, int *height)
if (gbuf) free(gbuf);
if (bbuf) free(bbuf);
if (abuf) free(abuf);
ImageClose(image);
return NULL;
}
ptr = base;

5
progs/tests/prog_parameter.c
View File

@ -192,6 +192,7 @@ static void Init( void )
GLfloat * params;
GLint max_program_env_parameters;
GLint max_program_local_parameters;
int i;
printf("GL_RENDERER = %s\n", (char *) glGetString(GL_RENDERER));
@ -238,6 +239,10 @@ static void Init( void )
params = malloc(max_program_env_parameters * 4 * sizeof(GLfloat));
for (i = 0; i < max_program_env_parameters * 4; i++) {
params[i] = 0.0F;
}
pass &= set_parameter_batch(max_program_env_parameters, params, "Env",
program_env_parameter4fv,
program_env_parameters4fv,

3
progs/tests/texdown.c
View File

@ -162,7 +162,7 @@ MeasureDownloadRate(void)
const int image_bytes = align(w * h * BytesPerTexel(Format), ALIGN);
const int bytes = image_bytes * NR_TEXOBJ;
GLubyte *orig_texImage, *orig_getImage;
GLubyte *texImage, *getImage;
GLubyte *texImage;
GLdouble t0, t1, time;
int count;
int i;
@ -184,7 +184,6 @@ MeasureDownloadRate(void)
printf("alloc %p %p\n", orig_texImage, orig_getImage);
texImage = (GLubyte *)align((unsigned long)orig_texImage, ALIGN);
getImage = (GLubyte *)align((unsigned long)orig_getImage, ALIGN);
for (i = 1; !(((unsigned long)texImage) & i); i<<=1)
;

12
progs/vpglsl/vp-tris.c
View File

@ -84,9 +84,9 @@ static void check_link(GLuint prog)
static void setup_uniforms()
{
{
GLuint loc1f = glGetUniformLocationARB(program, "Offset1f");
GLuint loc2f = glGetUniformLocationARB(program, "Offset2f");
GLuint loc4f = glGetUniformLocationARB(program, "Offset4f");
GLint loc1f = glGetUniformLocationARB(program, "Offset1f");
GLint loc2f = glGetUniformLocationARB(program, "Offset2f");
GLint loc4f = glGetUniformLocationARB(program, "Offset4f");
GLfloat vecKer[] =
{ 1.0, 0.0, 0.0, 1.0,
0.0, 1.0, 0.0, 1.0,
@ -105,9 +105,9 @@ static void setup_uniforms()
}
{
GLuint loc1f = glGetUniformLocationARB(program, "KernelValue1f");
GLuint loc2f = glGetUniformLocationARB(program, "KernelValue2f");
GLuint loc4f = glGetUniformLocationARB(program, "KernelValue4f");
GLint loc1f = glGetUniformLocationARB(program, "KernelValue1f");
GLint loc2f = glGetUniformLocationARB(program, "KernelValue2f");
GLint loc4f = glGetUniformLocationARB(program, "KernelValue4f");
GLfloat vecKer[] =
{ 1.0, 0.0, 0.0, 0.25,
0.0, 1.0, 0.0, 0.25,

15
progs/xdemos/glxinfo.c
View File

@ -401,6 +401,10 @@ print_screen_info(Display *dpy, int scrnum, Bool allowDirect, GLboolean limits)
root = RootWindow(dpy, scrnum);
/*
* Find a basic GLX visual. We'll then create a rendering context and
* query various info strings.
*/
visinfo = glXChooseVisual(dpy, scrnum, attribSingle);
if (!visinfo)
visinfo = glXChooseVisual(dpy, scrnum, attribDouble);
@ -409,24 +413,29 @@ print_screen_info(Display *dpy, int scrnum, Bool allowDirect, GLboolean limits)
ctx = glXCreateContext( dpy, visinfo, NULL, allowDirect );
#ifdef GLX_VERSION_1_3
{
/* Try glXChooseFBConfig() if glXChooseVisual didn't work.
* XXX when would that happen?
*/
if (!visinfo) {
int fbAttribSingle[] = {
GLX_RENDER_TYPE, GLX_RGBA_BIT,
GLX_RED_SIZE, 1,
GLX_GREEN_SIZE, 1,
GLX_BLUE_SIZE, 1,
GLX_DOUBLEBUFFER, GL_TRUE,
GLX_DOUBLEBUFFER, GL_FALSE,
None };
int fbAttribDouble[] = {
GLX_RENDER_TYPE, GLX_RGBA_BIT,
GLX_RED_SIZE, 1,
GLX_GREEN_SIZE, 1,
GLX_BLUE_SIZE, 1,
GLX_DOUBLEBUFFER, GL_TRUE,
None };
GLXFBConfig *configs = NULL;
int nConfigs;
if (!visinfo)
configs = glXChooseFBConfig(dpy, scrnum, fbAttribSingle, &nConfigs);
if (!configs)
configs = glXChooseFBConfig(dpy, scrnum, fbAttribDouble, &nConfigs);
if (configs) {

6
src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c
View File

@ -560,9 +560,9 @@ emit_instruction(
if (IS_DST0_CHANNEL_ENABLED( inst, CHAN_X ) ||
IS_DST0_CHANNEL_ENABLED( inst, CHAN_Y ) ||
IS_DST0_CHANNEL_ENABLED( inst, CHAN_Z )) {
LLVMValueRef *p_floor_log2;
LLVMValueRef *p_exp;
LLVMValueRef *p_log2;
LLVMValueRef *p_floor_log2 = NULL;
LLVMValueRef *p_exp = NULL;
LLVMValueRef *p_log2 = NULL;
src0 = emit_fetch( bld, inst, 0, CHAN_X );
src0 = lp_build_abs( &bld->base, src0 );

2
src/gallium/drivers/r300/Makefile
View File

@ -36,4 +36,4 @@ include ../../Makefile.template
.PHONY : $(COMPILER_ARCHIVE)
$(COMPILER_ARCHIVE):
cd $(TOP)/src/mesa/drivers/dri/r300/compiler; make
$(MAKE) -C $(TOP)/src/mesa/drivers/dri/r300/compiler

32
src/gallium/winsys/drm/vmware/core/vmwgfx_drm.h
View File

@ -46,6 +46,7 @@
#define DRM_VMW_FIFO_DEBUG 11
#define DRM_VMW_FENCE_WAIT 12
#define DRM_VMW_OVERLAY 13
#define DRM_VMW_CURSOR_BYPASS 14
/*************************************************************************/
/**
@ -503,4 +504,35 @@ struct drm_vmw_overlay_arg {
struct drm_vmw_rect dst;
};
/*************************************************************************/
/**
* DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass.
*
*/
#define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0)
#define DRM_VMW_CURSOR_BYPASS_FLAGS (1)
/**
* struct drm_vmw_cursor_bypass_arg
*
* @flags: Flags.
* @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed.
* @xpos: X position of cursor.
* @ypos: Y position of cursor.
* @xhot: X hotspot.
* @yhot: Y hotspot.
*
* Argument to the DRM_VMW_CURSOR_BYPASS Ioctl.
*/
struct drm_vmw_cursor_bypass_arg {
uint32_t flags;
uint32_t crtc_id;
int32_t xpos;
int32_t ypos;
int32_t xhot;
int32_t yhot;
};
#endif

4
src/gallium/winsys/drm/vmware/xorg/vmw_driver.h
View File

@ -44,6 +44,8 @@ struct vmw_driver
{
int fd;
void *cursor_priv;
/* vmw_video.c */
void *video_priv;
};
@ -69,6 +71,8 @@ Bool vmw_video_close(ScrnInfoPtr pScrn, struct vmw_driver *vmw);
* vmw_ioctl.c
*/
int vmw_ioctl_cursor_bypass(struct vmw_driver *vmw, int xhot, int yhot);
struct vmw_dma_buffer * vmw_ioctl_buffer_create(struct vmw_driver *vmw,
uint32_t size,
unsigned *handle);

17
src/gallium/winsys/drm/vmware/xorg/vmw_ioctl.c
View File

@ -54,6 +54,23 @@ struct vmw_dma_buffer
uint32_t size;
};
int
vmw_ioctl_cursor_bypass(struct vmw_driver *vmw, int xhot, int yhot)
{
struct drm_vmw_cursor_bypass_arg arg;
int ret;
memset(&arg, 0, sizeof(arg));
arg.flags = DRM_VMW_CURSOR_BYPASS_ALL;
arg.xhot = xhot;
arg.yhot = yhot;
ret = drmCommandWrite(vmw->fd, DRM_VMW_CURSOR_BYPASS,
&arg, sizeof(arg));
return ret;
}
struct vmw_dma_buffer *
vmw_ioctl_buffer_create(struct vmw_driver *vmw, uint32_t size, unsigned *handle)
{

58
src/gallium/winsys/drm/vmware/xorg/vmw_screen.c
View File

@ -33,16 +33,58 @@
#include "vmw_hook.h"
#include "vmw_driver.h"
/* modified version of crtc functions */
xf86CrtcFuncsRec vmw_screen_crtc_funcs;
static void
vmw_screen_cursor_load_argb(xf86CrtcPtr crtc, CARD32 *image)
{
struct vmw_driver *vmw = modesettingPTR(crtc->scrn)->winsys_priv;
xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(crtc->scrn);
xf86CrtcFuncsPtr funcs = vmw->cursor_priv;
CursorPtr c = config->cursor;
/* Run the ioctl before uploading the image */
vmw_ioctl_cursor_bypass(vmw, c->bits->xhot, c->bits->yhot);
funcs->load_cursor_argb(crtc, image);
}
static void
vmw_screen_cursor_init(ScrnInfoPtr pScrn, struct vmw_driver *vmw)
{
xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
int i;
/* XXX assume that all crtc's have the same function struct */
/* Save old struct need to call the old functions as well */
vmw->cursor_priv = (void*)(config->crtc[0]->funcs);
memcpy(&vmw_screen_crtc_funcs, vmw->cursor_priv, sizeof(xf86CrtcFuncsRec));
vmw_screen_crtc_funcs.load_cursor_argb = vmw_screen_cursor_load_argb;
for (i = 0; i < config->num_crtc; i++)
config->crtc[i]->funcs = &vmw_screen_crtc_funcs;
}
static void
vmw_screen_cursor_close(ScrnInfoPtr pScrn, struct vmw_driver *vmw)
{
xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
int i;
vmw_ioctl_cursor_bypass(vmw, 0, 0);
for (i = 0; i < config->num_crtc; i++)
config->crtc[i]->funcs = vmw->cursor_priv;
}
static Bool
vmw_screen_init(ScrnInfoPtr pScrn)
{
modesettingPtr ms = modesettingPTR(pScrn);
struct vmw_driver *vmw;
/* if gallium is used then we don't need to do anything. */
if (ms->screen)
return TRUE;
vmw = xnfcalloc(sizeof(*vmw), 1);
if (!vmw)
return FALSE;
@ -50,6 +92,12 @@ vmw_screen_init(ScrnInfoPtr pScrn)
vmw->fd = ms->fd;
ms->winsys_priv = vmw;
vmw_screen_cursor_init(pScrn, vmw);
/* if gallium is used then we don't need to do anything more. */
if (ms->screen)
return TRUE;
vmw_video_init(pScrn, vmw);
return TRUE;
@ -64,6 +112,8 @@ vmw_screen_close(ScrnInfoPtr pScrn)
if (!vmw)
return TRUE;
vmw_screen_cursor_close(pScrn, vmw);
vmw_video_close(pScrn, vmw);
ms->winsys_priv = NULL;

2
src/gallium/winsys/drm/vmware/xorg/vmw_video.c
View File

@ -342,6 +342,8 @@ vmw_video_close(ScrnInfoPtr pScrn, struct vmw_driver *vmw)
debug_printf("%s: enter\n", __func__);
video = vmw->video_priv;
if (!video)
return TRUE;
for (i = 0; i < VMWARE_VID_NUM_PORTS; ++i) {
vmw_video_port_cleanup(pScrn, &video->port[i]);

6
src/mesa/drivers/dri/intel/intel_fbo.c
View File

@ -126,7 +126,7 @@ intel_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
case GL_RGB16:
rb->Format = MESA_FORMAT_ARGB8888;
rb->DataType = GL_UNSIGNED_BYTE;
irb->texformat = MESA_FORMAT_XRGB8888;
irb->texformat = MESA_FORMAT_ARGB8888; /* XXX: Need xrgb8888 */
cpp = 4;
break;
case GL_RGBA:
@ -314,6 +314,10 @@ intel_create_renderbuffer(gl_format format)
irb->Base.DataType = GL_UNSIGNED_BYTE;
break;
case MESA_FORMAT_XRGB8888:
/* XXX this is a hack since XRGB surfaces don't seem to work
* properly yet. Reading the alpha channel returns 0 instead of 1.
*/
format = MESA_FORMAT_ARGB8888;
irb->Base._BaseFormat = GL_RGB;
irb->Base.DataType = GL_UNSIGNED_BYTE;
break;

29
src/mesa/drivers/dri/r600/r700_assembler.c
View File

@ -4626,22 +4626,6 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
need_barrier = GL_TRUE;
}
switch (pAsm->pILInst[pAsm->uiCurInst].Opcode)
{
case OPCODE_TEX:
break;
case OPCODE_TXB:
radeon_error("do not support TXB yet\n");
return GL_FALSE;
break;
case OPCODE_TXP:
break;
default:
radeon_error("Internal error: bad texture op (not TEX)\n");
return GL_FALSE;
break;
}
if (pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXP)
{
GLuint tmp = gethelpr(pAsm);
@ -4820,7 +4804,18 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm)
}
pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE;
if(pAsm->pILInst[pAsm->uiCurInst].Opcode == OPCODE_TXB)
{
pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE_L;
}
else
{
pAsm->D.dst.opcode = SQ_TEX_INST_SAMPLE;
}
pAsm->is_tex = GL_TRUE;
if ( GL_TRUE == need_barrier )
pAsm->is_tex = GL_TRUE;
if ( GL_TRUE == need_barrier )
{

2
src/mesa/drivers/dri/r600/r700_chip.c
View File

@ -1306,9 +1306,9 @@ void r600InitAtoms(context_t *context)
ALLOC_STATE(poly, always, 10, r700SendPolyState);
ALLOC_STATE(cb, cb, 18, r700SendCBState);
ALLOC_STATE(clrcmp, always, 6, r700SendCBCLRCMPState);
ALLOC_STATE(cb_target, always, 25, r700SendRenderTargetState);
ALLOC_STATE(blnd, blnd, (6 + (R700_MAX_RENDER_TARGETS * 3)), r700SendCBBlendState);
ALLOC_STATE(blnd_clr, always, 6, r700SendCBBlendColorState);
ALLOC_STATE(cb_target, always, 25, r700SendRenderTargetState);
ALLOC_STATE(sx, always, 9, r700SendSXState);
ALLOC_STATE(vgt, always, 41, r700SendVGTState);
ALLOC_STATE(spi, always, (59 + R700_MAX_SHADER_EXPORTS), r700SendSPIState);

23
src/mesa/drivers/dri/radeon/radeon_common.c
View File

@ -262,29 +262,6 @@ void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h)
}
}
void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask )
{
radeonContextPtr radeon = RADEON_CONTEXT(ctx);
GLuint i;
drm_radeon_stipple_t stipple;
/* Must flip pattern upside down.
*/
for ( i = 0 ; i < 32 ; i++ ) {
stipple.mask[31 - i] = ((GLuint *) mask)[i];
}
/* TODO: push this into cmd mechanism
*/
radeon_firevertices(radeon);
LOCK_HARDWARE( radeon );
drmCommandWrite( radeon->dri.fd, DRM_RADEON_STIPPLE,
&stipple, sizeof(stipple) );
UNLOCK_HARDWARE( radeon );
}
/* ================================================================
* SwapBuffers with client-side throttling
*/

1
src/mesa/drivers/dri/radeon/radeon_common.h
View File

@ -10,7 +10,6 @@ void radeonRecalcScissorRects(radeonContextPtr radeon);
void radeonSetCliprects(radeonContextPtr radeon);
void radeonUpdateScissor( GLcontext *ctx );
void radeonScissor(GLcontext* ctx, GLint x, GLint y, GLsizei w, GLsizei h);
void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask );
void radeonWaitForIdleLocked(radeonContextPtr radeon);
extern uint32_t radeonGetAge(radeonContextPtr radeon);

4
src/mesa/drivers/dri/radeon/radeon_context.h
View File

@ -331,8 +331,12 @@ struct r100_hw_state {
struct radeon_state_atom stp;
};
struct radeon_stipple_state {
GLuint mask[32];
};
struct r100_state {
struct radeon_stipple_state stipple;
struct radeon_texture_state texture;
};

6
src/mesa/drivers/dri/radeon/radeon_fbo.c
View File

@ -369,6 +369,12 @@ radeon_framebuffer_renderbuffer(GLcontext * ctx,
}
/* TODO: According to EXT_fbo spec internal format of texture image
* once set during glTexImage call, should be preserved when
* attaching image to renderbuffer. When HW doesn't support
* rendering to format of attached image, set framebuffer
* completeness accordingly in radeon_validate_framebuffer (issue #79).
*/
static GLboolean
radeon_update_wrapper(GLcontext *ctx, struct radeon_renderbuffer *rrb,
struct gl_texture_image *texImage)

26
src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
View File

@ -437,9 +437,12 @@ static void migrate_image_to_miptree(radeon_mipmap_tree *mt,
radeon_mipmap_level *srclvl = &image->mt->levels[image->mtlevel];
/* TODO: bring back these assertions once the FBOs are fixed */
#if 0
assert(image->mtlevel == level);
assert(srclvl->size == dstlvl->size);
assert(srclvl->rowstride == dstlvl->rowstride);
#endif
radeon_bo_map(image->mt->bo, GL_FALSE);
@ -450,23 +453,18 @@ static void migrate_image_to_miptree(radeon_mipmap_tree *mt,
radeon_miptree_unreference(&image->mt);
} else {
/* need to confirm this value is correct */
if (_mesa_is_format_compressed(image->base.TexFormat)) {
unsigned size = _mesa_format_image_size(image->base.TexFormat,
image->base.Width,
image->base.Height,
image->base.Depth);
memcpy(dest, image->base.Data, size);
} else {
uint32_t srcrowstride;
uint32_t height;
const uint32_t srcrowstride = _mesa_format_row_stride(image->base.TexFormat, image->base.Width);
uint32_t rows = image->base.Height * image->base.Depth;
height = image->base.Height * image->base.Depth;
srcrowstride = image->base.Width * _mesa_get_format_bytes(image->base.TexFormat);
copy_rows(dest, dstlvl->rowstride, image->base.Data, srcrowstride,
height, srcrowstride);
if (_mesa_is_format_compressed(image->base.TexFormat)) {
uint32_t blockWidth, blockHeight;
_mesa_get_format_block_size(image->base.TexFormat, &blockWidth, &blockHeight);
rows = (rows + blockHeight - 1) / blockHeight;
}
copy_rows(dest, dstlvl->rowstride, image->base.Data, srcrowstride,
rows, srcrowstride);
_mesa_free_texmemory(image->base.Data);
image->base.Data = 0;
}

25
src/mesa/drivers/dri/radeon/radeon_state.c
View File

@ -550,6 +550,31 @@ static void radeonPolygonOffset( GLcontext *ctx,
rmesa->hw.zbs.cmd[ZBS_SE_ZBIAS_CONSTANT] = constant.ui32;
}
static void radeonPolygonStipplePreKMS( GLcontext *ctx, const GLubyte *mask )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
GLuint i;
drm_radeon_stipple_t stipple;
/* Must flip pattern upside down.
*/
for ( i = 0 ; i < 32 ; i++ ) {
rmesa->state.stipple.mask[31 - i] = ((GLuint *) mask)[i];
}
/* TODO: push this into cmd mechanism
*/
radeon_firevertices(&rmesa->radeon);
LOCK_HARDWARE( &rmesa->radeon );
/* FIXME: Use window x,y offsets into stipple RAM.
*/
stipple.mask = rmesa->state.stipple.mask;
drmCommandWrite( rmesa->radeon.dri.fd, DRM_RADEON_STIPPLE,
&stipple, sizeof(drm_radeon_stipple_t) );
UNLOCK_HARDWARE( &rmesa->radeon );
}
static void radeonPolygonMode( GLcontext *ctx, GLenum face, GLenum mode )
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);

11
src/mesa/drivers/dri/radeon/radeon_texture.c
View File

@ -515,15 +515,18 @@ static int image_matches_texture_obj(struct gl_texture_object *texObj,
struct gl_texture_image *texImage,
unsigned level)
{
const struct gl_texture_image *baseImage = texObj->Image[0][level];
const struct gl_texture_image *baseImage = texObj->Image[0][texObj->BaseLevel];
if (!baseImage)
return 0;
if (level < texObj->BaseLevel || level > texObj->MaxLevel)
return 0;
const unsigned levelDiff = level - texObj->BaseLevel;
const unsigned refWidth = baseImage->Width >> levelDiff;
const unsigned refHeight = baseImage->Height >> levelDiff;
const unsigned refDepth = baseImage->Depth >> levelDiff;
const unsigned refWidth = MAX2(baseImage->Width >> levelDiff, 1);
const unsigned refHeight = MAX2(baseImage->Height >> levelDiff, 1);
const unsigned refDepth = MAX2(baseImage->Depth >> levelDiff, 1);
return (texImage->Width == refWidth &&
texImage->Height == refHeight &&