radeonsi: enable displayable DCC on Ravens
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1f21396431
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b563460b49
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@ -458,6 +458,14 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
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assert(ib_align);
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info->ib_start_alignment = ib_align;
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if (info->drm_minor >= 31 &&
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(info->family == CHIP_RAVEN ||
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info->family == CHIP_RAVEN2)) {
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if (info->num_render_backends == 1)
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info->use_display_dcc_unaligned = true;
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else
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info->use_display_dcc_with_retile_blit = true;
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}
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return true;
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}
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@ -45,6 +45,10 @@ do_winsys_init(struct radv_amdgpu_winsys *ws, int fd)
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if (!ac_query_gpu_info(fd, ws->dev, &ws->info, &ws->amdinfo))
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return false;
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/* temporary */
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ws->info.use_display_dcc_unaligned = false;
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ws->info.use_display_dcc_with_retile_blit = false;
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ws->addrlib = amdgpu_addr_create(&ws->info, &ws->amdinfo, &ws->info.max_alignment);
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if (!ws->addrlib) {
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fprintf(stderr, "amdgpu: Cannot create addrlib.\n");
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