broadcom/vc5: Fix layout of 3D textures.
Cube maps are entire miptrees repeated, while 3D textures have each level have all of its layers next to each other. Fixes tex3d and tex-miplevel-selection GL2:texture() 3D.
This commit is contained in:
Eric Anholt
parent
97dc077303
commit
b4b4ada761
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@ -75,18 +75,22 @@ vc5_debug_resource_layout(struct vc5_resource *rsc, const char *caller)
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int level_width = slice->stride / rsc->cpp;
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int level_height = slice->padded_height;
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int level_depth =
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u_minify(util_next_power_of_two(prsc->depth0), i);
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fprintf(stderr,
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"rsc %s %p (format %s), %dx%d: "
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"level %d (%s) %dx%d -> %dx%d, stride %d@0x%08x\n",
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"level %d (%s) %dx%dx%d -> %dx%dx%d, stride %d@0x%08x\n",
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caller, rsc,
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util_format_short_name(prsc->format),
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prsc->width0, prsc->height0,
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i, tiling_descriptions[slice->tiling],
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u_minify(prsc->width0, i),
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u_minify(prsc->height0, i),
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u_minify(prsc->depth0, i),
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level_width,
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level_height,
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level_depth,
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slice->stride,
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rsc->bo->offset + slice->offset);
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}
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@ -98,14 +102,8 @@ vc5_resource_bo_alloc(struct vc5_resource *rsc)
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struct pipe_resource *prsc = &rsc->base;
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struct pipe_screen *pscreen = prsc->screen;
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struct vc5_bo *bo;
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int layers = (prsc->target == PIPE_TEXTURE_3D ?
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prsc->depth0 : prsc->array_size);
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bo = vc5_bo_alloc(vc5_screen(pscreen),
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rsc->slices[0].offset +
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rsc->slices[0].size +
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rsc->cube_map_stride * layers - 1,
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"resource");
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bo = vc5_bo_alloc(vc5_screen(pscreen), rsc->size, "resource");
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if (bo) {
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vc5_bo_unreference(&rsc->bo);
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rsc->bo = bo;
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@ -128,13 +126,21 @@ vc5_resource_transfer_unmap(struct pipe_context *pctx,
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struct vc5_resource_slice *slice = &rsc->slices[ptrans->level];
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if (ptrans->usage & PIPE_TRANSFER_WRITE) {
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vc5_store_tiled_image(rsc->bo->map + slice->offset +
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ptrans->box.z * rsc->cube_map_stride,
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slice->stride,
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trans->map, ptrans->stride,
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slice->tiling, rsc->cpp,
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slice->padded_height,
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&ptrans->box);
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for (int z = 0; z < ptrans->box.depth; z++) {
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void *dst = rsc->bo->map +
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vc5_layer_offset(&rsc->base,
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ptrans->level,
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ptrans->box.z + z);
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vc5_store_tiled_image(dst,
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slice->stride,
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(trans->map +
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ptrans->stride *
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ptrans->box.height * z),
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ptrans->stride,
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slice->tiling, rsc->cpp,
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slice->padded_height,
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&ptrans->box);
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}
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}
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free(trans->map);
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}
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@ -259,13 +265,21 @@ vc5_resource_transfer_map(struct pipe_context *pctx,
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trans->map = malloc(ptrans->layer_stride * ptrans->box.depth);
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if (usage & PIPE_TRANSFER_READ) {
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vc5_load_tiled_image(trans->map, ptrans->stride,
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buf + slice->offset +
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ptrans->box.z * rsc->cube_map_stride,
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slice->stride,
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slice->tiling, rsc->cpp,
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slice->padded_height,
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for (int z = 0; z < ptrans->box.depth; z++) {
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void *src = rsc->bo->map +
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vc5_layer_offset(&rsc->base,
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ptrans->level,
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ptrans->box.z + z);
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vc5_load_tiled_image((trans->map +
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ptrans->stride *
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ptrans->box.height * z),
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ptrans->stride,
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src,
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slice->stride,
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slice->tiling, rsc->cpp,
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slice->padded_height,
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&ptrans->box);
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}
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}
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return trans->map;
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} else {
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@ -378,8 +392,10 @@ vc5_setup_slices(struct vc5_resource *rsc)
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struct pipe_resource *prsc = &rsc->base;
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uint32_t width = prsc->width0;
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uint32_t height = prsc->height0;
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uint32_t depth = prsc->depth0;
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uint32_t pot_width = util_next_power_of_two(width);
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uint32_t pot_height = util_next_power_of_two(height);
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uint32_t pot_depth = util_next_power_of_two(depth);
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uint32_t offset = 0;
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uint32_t utile_w = vc5_utile_width(rsc->cpp);
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uint32_t utile_h = vc5_utile_height(rsc->cpp);
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@ -396,7 +412,7 @@ vc5_setup_slices(struct vc5_resource *rsc)
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for (int i = prsc->last_level; i >= 0; i--) {
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struct vc5_resource_slice *slice = &rsc->slices[i];
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uint32_t level_width, level_height;
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uint32_t level_width, level_height, level_depth;
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if (i < 2) {
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level_width = u_minify(width, i);
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level_height = u_minify(height, i);
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@ -404,6 +420,10 @@ vc5_setup_slices(struct vc5_resource *rsc)
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level_width = u_minify(pot_width, i);
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level_height = u_minify(pot_height, i);
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}
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if (i < 1)
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level_depth = u_minify(depth, i);
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else
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level_depth = u_minify(pot_depth, i);
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if (msaa) {
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level_width *= 2;
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@ -468,6 +488,9 @@ vc5_setup_slices(struct vc5_resource *rsc)
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slice->padded_height = level_height;
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slice->size = level_height * slice->stride;
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offset += slice->size * level_depth;
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/* The HW aligns level 1's base to a page if any of level 1 or
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* below could be UIF XOR. The lower levels then inherit the
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* alignment for as long as necesary, thanks to being power of
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@ -476,11 +499,10 @@ vc5_setup_slices(struct vc5_resource *rsc)
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if (i == 1 &&
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level_width > 4 * uif_block_w &&
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level_height > PAGE_CACHE_MINUS_1_5_UB_ROWS * uif_block_h) {
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slice->size = align(slice->size, VC5_UIFCFG_PAGE_SIZE);
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offset = align(offset, VC5_UIFCFG_PAGE_SIZE);
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}
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offset += slice->size;
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}
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rsc->size = offset;
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/* UIF/UBLINEAR levels need to be aligned to UIF-blocks, and LT only
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* needs to be aligned to utile boundaries. Since tiles are laid out
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@ -493,15 +515,34 @@ vc5_setup_slices(struct vc5_resource *rsc)
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uint32_t page_align_offset = (align(rsc->slices[0].offset, 4096) -
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rsc->slices[0].offset);
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if (page_align_offset) {
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rsc->size += page_align_offset;
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for (int i = 0; i <= prsc->last_level; i++)
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rsc->slices[i].offset += page_align_offset;
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}
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/* Arrays, cubes, and 3D textures have a stride which is the distance
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* from one full mipmap tree to the next (64b aligned).
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/* Arrays and cube textures have a stride which is the distance from
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* one full mipmap tree to the next (64b aligned). For 3D textures,
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* we need to program the stride between slices of miplevel 0.
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*/
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rsc->cube_map_stride = align(rsc->slices[0].offset +
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rsc->slices[0].size, 64);
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if (prsc->target != PIPE_TEXTURE_3D) {
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rsc->cube_map_stride = align(rsc->slices[0].offset +
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rsc->slices[0].size, 64);
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rsc->size += rsc->cube_map_stride * (prsc->array_size - 1);
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} else {
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rsc->cube_map_stride = rsc->slices[0].size;
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}
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}
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uint32_t
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vc5_layer_offset(struct pipe_resource *prsc, uint32_t level, uint32_t layer)
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{
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struct vc5_resource *rsc = vc5_resource(prsc);
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struct vc5_resource_slice *slice = &rsc->slices[level];
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if (prsc->target == PIPE_TEXTURE_3D)
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return slice->offset + layer * slice->size;
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else
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return slice->offset + layer * rsc->cube_map_stride;
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}
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static struct vc5_resource *
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@ -737,8 +778,8 @@ vc5_create_surface(struct pipe_context *pctx,
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psurf->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
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psurf->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
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surface->offset = (slice->offset +
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psurf->u.tex.first_layer * rsc->cube_map_stride);
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surface->offset = vc5_layer_offset(ptex, level,
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psurf->u.tex.first_layer);
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surface->tiling = slice->tiling;
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surface->format = vc5_get_rt_format(&screen->devinfo, psurf->format);
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@ -74,6 +74,10 @@ struct vc5_resource_slice {
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uint32_t offset;
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uint32_t stride;
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uint32_t padded_height;
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/* Size of a single pane of the slice. For 3D textures, there will be
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* a number of panes equal to the minified, power-of-two-aligned
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* depth.
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*/
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uint32_t size;
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uint8_t ub_pad;
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enum vc5_tiling_mode tiling;
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@ -113,6 +117,7 @@ struct vc5_resource {
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struct vc5_bo *bo;
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struct vc5_resource_slice slices[VC5_MAX_MIP_LEVELS];
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uint32_t cube_map_stride;
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uint32_t size;
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int cpp;
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bool tiled;
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@ -163,5 +168,8 @@ void vc5_resource_screen_init(struct pipe_screen *pscreen);
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void vc5_resource_context_init(struct pipe_context *pctx);
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struct pipe_resource *vc5_resource_create(struct pipe_screen *pscreen,
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const struct pipe_resource *tmpl);
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uint32_t vc5_layer_offset(struct pipe_resource *prsc, uint32_t level,
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uint32_t layer);
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#endif /* VC5_RESOURCE_H */
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