intel/compiler: Don't handle fsign.sat

No shader-db or CI changes on any Intel platform.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
This commit is contained in:
Ian Romanick 2018-09-09 14:06:43 -07:00
parent a68dd47b91
commit b44c9292b7
2 changed files with 3 additions and 23 deletions

View File

@ -842,6 +842,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
break;
case nir_op_fsign: {
assert(!instr->dest.saturate);
if (op[0].abs) {
/* Straightforward since the source can be assumed to be either
* strictly >= 0 or strictly <= 0 depending on the setting of the
@ -854,10 +855,6 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
: bld.MOV(result, brw_imm_f(1.0f));
set_predicate(BRW_PREDICATE_NORMAL, inst);
if (instr->dest.saturate)
inst->saturate = true;
} else if (type_sz(op[0].type) < 8) {
/* AND(val, 0x80000000) gives the sign bit.
*
@ -873,10 +870,6 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
inst = bld.OR(result_int, result_int, brw_imm_ud(0x3f800000u));
inst->predicate = BRW_PREDICATE_NORMAL;
if (instr->dest.saturate) {
inst = bld.MOV(result, result);
inst->saturate = true;
}
} else {
/* For doubles we do the same but we need to consider:
*
@ -897,11 +890,6 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
set_predicate(BRW_PREDICATE_NORMAL,
bld.OR(r, r, brw_imm_ud(0x3ff00000u)));
if (instr->dest.saturate) {
inst = bld.MOV(result, result);
inst->saturate = true;
}
}
break;
}

View File

@ -1818,6 +1818,7 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
unreachable("not reached: should have been lowered");
case nir_op_fsign:
assert(!instr->dest.saturate);
if (op[0].abs) {
/* Straightforward since the source can be assumed to be either
* strictly >= 0 or strictly <= 0 depending on the setting of the
@ -1830,10 +1831,6 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
? emit(MOV(dst, brw_imm_f(-1.0f)))
: emit(MOV(dst, brw_imm_f(1.0f)));
inst->predicate = BRW_PREDICATE_NORMAL;
if (instr->dest.saturate)
inst->saturate = true;
} else if (type_sz(op[0].type) < 8) {
/* AND(val, 0x80000000) gives the sign bit.
*
@ -1849,11 +1846,6 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
inst = emit(OR(dst, src_reg(dst), brw_imm_ud(0x3f800000u)));
inst->predicate = BRW_PREDICATE_NORMAL;
dst.type = BRW_REGISTER_TYPE_F;
if (instr->dest.saturate) {
inst = emit(MOV(dst, src_reg(dst)));
inst->saturate = true;
}
} else {
/* For doubles we do the same but we need to consider:
*
@ -1886,7 +1878,7 @@ vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
/* Now convert the result from float to double */
emit_conversion_to_double(dst, retype(src_reg(tmp),
BRW_REGISTER_TYPE_F),
instr->dest.saturate);
false);
}
break;