asahi: Handle flushes of depth-only rendering
Not totally right but this should be a start. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15482>
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@ -412,10 +412,6 @@ agx_flush(struct pipe_context *pctx,
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if (fence)
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*fence = NULL;
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/* TODO */
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if (!ctx->batch->cbufs[0])
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return;
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/* Nothing to do */
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if (!(ctx->batch->draw | ctx->batch->clear))
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return;
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@ -430,7 +426,7 @@ agx_flush(struct pipe_context *pctx,
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struct agx_device *dev = agx_device(pctx->screen);
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if (ctx->batch->clear & PIPE_CLEAR_COLOR0) {
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if ((ctx->batch->clear & PIPE_CLEAR_COLOR0) || !ctx->batch->cbufs[0]) {
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uint16_t clear_colour[4] = {
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_mesa_float_to_half(ctx->batch->clear_color[0]),
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_mesa_float_to_half(ctx->batch->clear_color[1]),
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@ -463,15 +459,21 @@ agx_flush(struct pipe_context *pctx,
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agx_pool_alloc_aligned(&ctx->batch->pipeline_pool, 64, 64);
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memset(pipeline_null.cpu, 0, 64);
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struct agx_resource *rt0 = agx_resource(ctx->batch->cbufs[0]->texture);
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BITSET_SET(rt0->data_valid, 0);
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for (unsigned i = 0; i < ctx->batch->nr_cbufs; ++i) {
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struct agx_resource *rt = agx_resource(ctx->batch->cbufs[i]->texture);
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BITSET_SET(rt->data_valid, 0);
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}
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struct agx_resource *zbuf = ctx->batch->zsbuf ?
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agx_resource(ctx->batch->zsbuf->texture) : NULL;
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if (zbuf)
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if (zbuf) {
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BITSET_SET(zbuf->data_valid, 0);
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if (zbuf->separate_stencil)
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BITSET_SET(zbuf->separate_stencil->data_valid, 0);
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}
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/* BO list for a given batch consists of:
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* - BOs for the batch's framebuffer surfaces
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* - BOs for the batch's pools
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@ -497,6 +499,9 @@ agx_flush(struct pipe_context *pctx,
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struct pipe_surface *surf = batch->zsbuf;
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struct agx_resource *rsrc = agx_resource(surf->texture);
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agx_batch_add_bo(batch, rsrc->bo);
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if (rsrc->separate_stencil)
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agx_batch_add_bo(batch, rsrc->separate_stencil->bo);
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}
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unsigned handle_count =
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