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radv: do nir_lower_bit_size after algebraic optimizations 

There are too many algebraic optimizations to be certain that one of them
couldn't create instructions which need lowering. It also creates better
code for some reason.

fossil-db (parallel-rdp, Navi):
Totals from 217 (31.77% of 683) affected shaders:
VGPRs: 7716 -> 7672 (-0.57%)
CodeSize: 1516152 -> 1510688 (-0.36%); split: -0.38%, +0.02%
MaxWaves: 3964 -> 3982 (+0.45%)
Instrs: 269445 -> 268508 (-0.35%); split: -0.36%, +0.02%
Cycles: 37963416 -> 37912592 (-0.13%); split: -0.15%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4791>
This commit is contained in:
Rhys Perry 2020-10-30 15:54:12 +00:00 committed by Marge Bot
parent c77114967f
commit b2ce7da149
1 changed files with 6 additions and 3 deletions
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9
src/amd/vulkan/radv_pipeline.c
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@ -3147,9 +3147,6 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline,
if (!radv_use_llvm_for_stage(device, i))
nir_lower_int64(nir[i]);
if (nir_lower_bit_size(nir[i], lower_bit_size_callback, NULL))
nir_copy_prop(nir[i]); /* allow nir_opt_idiv_const() to optimize lowered divisions */
/* TODO: Implement nir_op_uadd_sat with LLVM. */
if (!radv_use_llvm_for_stage(device, i))
nir_opt_idiv_const(nir[i], 32);
@ -3181,6 +3178,12 @@ VkResult radv_create_shaders(struct radv_pipeline *pipeline,
NIR_PASS_V(nir[i], nir_opt_cse);
}
if (nir_lower_bit_size(nir[i], lower_bit_size_callback, NULL)) {
nir_lower_idiv(nir[i], nir_lower_idiv_precise);
nir_opt_constant_folding(nir[i]);
nir_opt_dce(nir[i]);
}
/* cleanup passes */
nir_lower_load_const_to_scalar(nir[i]);
nir_move_options move_opts = (nir_move_options)(