From b1fa2068b8e87474e1a0e3c98e2bff0e744348f3 Mon Sep 17 00:00:00 2001 From: Emma Anholt Date: Wed, 23 Mar 2022 22:13:20 -0700 Subject: [PATCH] nouveau/nir: Enable nir_opt_move/sink. NIR load_consts/inputs tend to happen together at the top of the program. In the TGSI backend the loads got emitted at use time, while the NIR backend was emitting the loads at load intrinsic time. By sinking the intrinsics, we can greatly reduce register pressure. nv92 NIR results: total local in shared programs: 2024 -> 2020 (-0.20%) local in affected programs: 4 -> 0 total gpr in shared programs: 790424 -> 735455 (-6.95%) gpr in affected programs: 215968 -> 160999 (-25.45%) total instructions in shared programs: 6058339 -> 6051208 (-0.12%) instructions in affected programs: 410795 -> 403664 (-1.74%) total bytes in shared programs: 41820104 -> 41660304 (-0.38%) bytes in affected programs: 7147296 -> 6987496 (-2.24%) Reviewed-by: Karol Herbst Part-of: --- src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp index 87f6b679080..4c5e3261d7a 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp @@ -3173,6 +3173,14 @@ Converter::run() NIR_PASS(progress, nir, nir_lower_64bit_phis); } while (progress); + nir_move_options move_options = + (nir_move_options)(nir_move_const_undef | + nir_move_load_ubo | + nir_move_load_uniform | + nir_move_load_input); + NIR_PASS_V(nir, nir_opt_sink, move_options); + NIR_PASS_V(nir, nir_opt_move, move_options); + NIR_PASS_V(nir, nir_lower_bool_to_int32); NIR_PASS_V(nir, nir_convert_from_ssa, true);