radeonsi: rename and apply SI_OP_CPDMA_SKIP_CACHE_FLUSH to compute as well

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9795>
This commit is contained in:
Marek Olšák 2021-03-21 14:23:30 -04:00 committed by Marge Bot
parent 419e05d5f6
commit b1a73ec99b
3 changed files with 12 additions and 9 deletions

View File

@ -72,7 +72,8 @@ void si_launch_grid_internal(struct si_context *sctx, struct pipe_grid_info *inf
/* Invalidate L0-L1 caches. */
/* sL0 is never invalidated, because src resources don't use it. */
sctx->flags |= SI_CONTEXT_INV_VCACHE;
if (!(flags & SI_OP_SKIP_CACHE_INV_BEFORE))
sctx->flags |= SI_CONTEXT_INV_VCACHE;
/* Set settings for driver-internal compute dispatches. */
sctx->flags &= ~SI_CONTEXT_START_PIPELINE_STATS;
@ -125,7 +126,8 @@ static void si_compute_clear_12bytes_buffer(struct si_context *sctx, struct pipe
unsigned data[4] = {0};
memcpy(data, clear_value, 12);
sctx->flags |= si_get_flush_flags(sctx, coher, SI_COMPUTE_DST_CACHE_POLICY);
if (!(flags & SI_OP_SKIP_CACHE_INV_BEFORE))
sctx->flags |= si_get_flush_flags(sctx, coher, SI_COMPUTE_DST_CACHE_POLICY);
struct pipe_shader_buffer saved_sb = {0};
si_get_shader_buffers(sctx, PIPE_SHADER_COMPUTE, 0, 1, &saved_sb);
@ -188,7 +190,8 @@ static void si_compute_do_clear_or_copy(struct si_context *sctx, struct pipe_res
assert(dst->target != PIPE_BUFFER || dst_offset + size <= dst->width0);
assert(!src || src_offset + size <= src->width0);
sctx->flags |= si_get_flush_flags(sctx, coher, SI_COMPUTE_DST_CACHE_POLICY);
if (!(flags & SI_OP_SKIP_CACHE_INV_BEFORE))
sctx->flags |= si_get_flush_flags(sctx, coher, SI_COMPUTE_DST_CACHE_POLICY);
/* Save states. */
void *saved_cs = sctx->cs_shader_state.program;

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@ -208,7 +208,7 @@ void si_cp_dma_clear_buffer(struct si_context *sctx, struct radeon_cmdbuf *cs,
if (sdst) {
util_range_add(dst, &sdst->valid_buffer_range, offset, offset + size);
if (!(user_flags & SI_OP_CPDMA_SKIP_CACHE_FLUSH))
if (!(user_flags & SI_OP_SKIP_CACHE_INV_BEFORE))
sctx->flags |= si_get_flush_flags(sctx, coher, cache_policy);
}
@ -345,7 +345,7 @@ void si_cp_dma_copy_buffer(struct si_context *sctx, struct pipe_resource *dst,
if (user_flags & SI_OP_SYNC_PS_BEFORE)
sctx->flags |= SI_CONTEXT_PS_PARTIAL_FLUSH;
if ((dst || src) && !(user_flags & SI_OP_CPDMA_SKIP_CACHE_FLUSH))
if ((dst || src) && !(user_flags & SI_OP_SKIP_CACHE_INV_BEFORE))
sctx->flags |= si_get_flush_flags(sctx, coher, cache_policy);
/* This is the main part doing the copying. Src is always aligned. */

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@ -1367,10 +1367,10 @@ void si_init_clear_functions(struct si_context *sctx);
#define SI_OP_SYNC_BEFORE (SI_OP_SYNC_CS_BEFORE | SI_OP_SYNC_PS_BEFORE | SI_OP_SYNC_CPDMA_BEFORE)
#define SI_OP_SYNC_AFTER (1 << 3)
#define SI_OP_SYNC_BEFORE_AFTER (SI_OP_SYNC_BEFORE | SI_OP_SYNC_AFTER)
#define SI_OP_CS_IMAGE (1 << 4)
#define SI_OP_CS_RENDER_COND_ENABLE (1 << 5)
#define SI_OP_CPDMA_SKIP_CHECK_CS_SPACE (1 << 6) /* don't call need_cs_space */
#define SI_OP_CPDMA_SKIP_CACHE_FLUSH (1 << 7) /* don't flush caches */
#define SI_OP_SKIP_CACHE_INV_BEFORE (1 << 4) /* don't invalidate caches */
#define SI_OP_CS_IMAGE (1 << 5)
#define SI_OP_CS_RENDER_COND_ENABLE (1 << 6)
#define SI_OP_CPDMA_SKIP_CHECK_CS_SPACE (1 << 7) /* don't call need_cs_space */
unsigned si_get_flush_flags(struct si_context *sctx, enum si_coherency coher,
enum si_cache_policy cache_policy);