pan/bi: Flesh out ATEST in IR
ATEST actually takes two sources and has a destination. Although the details are a little funny, we should still model this correctly. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4242>
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@ -28,7 +28,7 @@
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unsigned bi_class_props[BI_NUM_CLASSES] = {
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[BI_ADD] = BI_GENERIC | BI_MODS | BI_SCHED_ALL,
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[BI_ATEST] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR,
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[BI_ATEST] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD,
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[BI_BRANCH] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD,
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[BI_CMP] = BI_GENERIC | BI_MODS | BI_SCHED_ALL,
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[BI_BLEND] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR,
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@ -120,7 +120,22 @@ bi_emit_frag_out(bi_context *ctx, nir_intrinsic_instr *instr)
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{
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if (!ctx->emitted_atest) {
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bi_instruction ins = {
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.type = BI_ATEST
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.type = BI_ATEST,
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.src = {
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BIR_INDEX_REGISTER | 60 /* TODO: RA */,
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bir_src_index(&instr->src[0])
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},
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.src_types = {
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nir_type_uint32,
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nir_type_float32
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},
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.swizzle = {
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{ 0 },
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{ 3, 0 } /* swizzle out the alpha */
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},
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.dest = BIR_INDEX_REGISTER | 60 /* TODO: RA */,
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.dest_type = nir_type_uint32,
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.writemask = 0xF
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};
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bi_emit(ctx, ins);
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