From b06b481dfe55c831cbfad45ea1299bcb437b1555 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= <marek.olsak@amd.com>
Date: Wed, 8 Dec 2021 01:11:21 -0500
Subject: [PATCH] radeonsi: program COMPUTE_STATIC_THREAD_MGMT_SE4..7 on
 Arcturus

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14122>
---
 .../registers/registers-manually-defined.json | 20 +++++++++++++++++++
 src/gallium/drivers/radeonsi/si_compute.c     |  8 ++++++++
 2 files changed, 28 insertions(+)

diff --git a/src/amd/registers/registers-manually-defined.json b/src/amd/registers/registers-manually-defined.json
index 8ea46f8a538..c50d33e3f03 100644
--- a/src/amd/registers/registers-manually-defined.json
+++ b/src/amd/registers/registers-manually-defined.json
@@ -38,6 +38,26 @@
    "name": "SRBM_STATUS3",
    "type_ref": "SRBM_STATUS3"
   },
+  {
+   "chips": ["gfx9"],
+   "map": {"at": 47252, "to": "mm"},
+   "name": "COMPUTE_STATIC_THREAD_MGMT_SE4"
+  },
+  {
+   "chips": ["gfx9"],
+   "map": {"at": 47256, "to": "mm"},
+   "name": "COMPUTE_STATIC_THREAD_MGMT_SE5"
+  },
+  {
+   "chips": ["gfx9"],
+   "map": {"at": 47260, "to": "mm"},
+   "name": "COMPUTE_STATIC_THREAD_MGMT_SE6"
+  },
+  {
+   "chips": ["gfx9"],
+   "map": {"at": 47264, "to": "mm"},
+   "name": "COMPUTE_STATIC_THREAD_MGMT_SE7"
+  },
   {
    "chips": ["gfx103"],
    "map": {"at": 199052, "to": "mm"},
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 7447f7923ee..743f81af3e7 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -426,6 +426,14 @@ void si_emit_initial_compute_regs(struct si_context *sctx, struct radeon_cmdbuf
        (cs != &sctx->gfx_cs || !sctx->screen->info.has_graphics)) {
       radeon_set_uconfig_reg(R_0301EC_CP_COHER_START_DELAY,
                              sctx->chip_class >= GFX10 ? 0x20 : 0);
+
+      if (!info->has_graphics && info->family >= CHIP_ARCTURUS) {
+         radeon_set_sh_reg_seq(R_00B894_COMPUTE_STATIC_THREAD_MGMT_SE4, 4);
+         radeon_emit(S_00B858_SH0_CU_EN(info->spi_cu_en) | S_00B858_SH1_CU_EN(info->spi_cu_en));
+         radeon_emit(S_00B858_SH0_CU_EN(info->spi_cu_en) | S_00B858_SH1_CU_EN(info->spi_cu_en));
+         radeon_emit(S_00B858_SH0_CU_EN(info->spi_cu_en) | S_00B858_SH1_CU_EN(info->spi_cu_en));
+         radeon_emit(S_00B858_SH0_CU_EN(info->spi_cu_en) | S_00B858_SH1_CU_EN(info->spi_cu_en));
+      }
    }
 
    if (sctx->chip_class >= GFX10) {