radeonsi: add shader profiles that disable binning
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13966>
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@ -1182,6 +1182,8 @@ struct si_context {
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bool need_check_render_feedback;
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bool decompression_enabled;
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bool dpbb_force_off;
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bool dpbb_force_off_profile_vs;
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bool dpbb_force_off_profile_ps;
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bool vs_writes_viewport_index;
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bool vs_disables_clipping_viewport;
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@ -291,6 +291,8 @@ enum
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#define SI_PROFILE_WAVE32 (1 << 0)
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#define SI_PROFILE_WAVE64 (1 << 1)
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#define SI_PROFILE_IGNORE_LLVM_DISCARD_BUG (1 << 2)
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#define SI_PROFILE_VS_NO_BINNING (1 << 3)
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#define SI_PROFILE_PS_NO_BINNING (1 << 4)
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/**
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* For VS shader keys, describe any fixups required for vertex fetch.
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@ -41,11 +41,21 @@ struct si_shader_profile {
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static struct si_shader_profile profiles[] =
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{
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{
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/* Plot3D */
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{0x485320cd, 0x87a9ba05, 0x24a60e4f, 0x25aa19f7, 0xf5287451},
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SI_PROFILE_VS_NO_BINNING,
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},
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{
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/* Viewperf/Energy isn't affected by the discard bug. */
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{0x17118671, 0xd0102e0c, 0x947f3592, 0xb2057e7b, 0x4da5d9b0},
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SI_PROFILE_IGNORE_LLVM_DISCARD_BUG,
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},
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{
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/* Viewperf/Medical */
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{0x4dce4331, 0x38f778d5, 0x1b75a717, 0x3e454fb9, 0xeb1527f0},
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SI_PROFILE_PS_NO_BINNING,
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},
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{
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/* Viewperf/Medical, a shader with a divergent loop doesn't benefit from Wave32,
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* probably due to interpolation performance.
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@ -449,7 +449,8 @@ void si_emit_dpbb_state(struct si_context *sctx)
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assert(sctx->chip_class >= GFX9);
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if (!sscreen->dpbb_allowed || sctx->dpbb_force_off) {
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if (!sscreen->dpbb_allowed || sctx->dpbb_force_off ||
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sctx->dpbb_force_off_profile_vs || sctx->dpbb_force_off_profile_ps) {
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si_emit_dpbb_disable(sctx);
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return;
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}
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@ -3336,6 +3336,15 @@ static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
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si_get_vs(sctx)->current);
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si_update_rasterized_prim(sctx);
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si_vs_key_update_inputs(sctx);
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if (sctx->screen->dpbb_allowed) {
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bool force_off = sel && sel->info.options & SI_PROFILE_VS_NO_BINNING;
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if (force_off != sctx->dpbb_force_off_profile_vs) {
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sctx->dpbb_force_off_profile_vs = force_off;
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si_mark_atom_dirty(sctx, &sctx->atoms.s.dpbb_state);
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}
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}
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}
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static void si_update_tess_uses_prim_id(struct si_context *sctx)
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@ -3555,6 +3564,15 @@ static void si_bind_ps_shader(struct pipe_context *ctx, void *state)
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si_update_ps_inputs_read_or_disabled(sctx);
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si_update_ps_kill_enable(sctx);
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si_update_vrs_flat_shading(sctx);
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if (sctx->screen->dpbb_allowed) {
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bool force_off = sel && sel->info.options & SI_PROFILE_PS_NO_BINNING;
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if (force_off != sctx->dpbb_force_off_profile_ps) {
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sctx->dpbb_force_off_profile_ps = force_off;
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si_mark_atom_dirty(sctx, &sctx->atoms.s.dpbb_state);
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}
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}
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}
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static void si_delete_shader(struct si_context *sctx, struct si_shader *shader)
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