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aco: validate 8-bit/16-bit VGPR operands for readfirstlane/readlane/writelane 

I would expect it to just work as intended and other solutions,
like v_and_b32 to make sure the upper bits are 0, might have some
overhead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
This commit is contained in:
Samuel Pitoiset 2020-04-08 08:53:47 +02:00 committed by Marge Bot
parent 86e2b03e3f
commit af7e2c6133
1 changed files with 1 additions and 1 deletions
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2
src/amd/compiler/aco_validate.cpp
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@ -229,7 +229,7 @@ void validate(Program* program, FILE * output)
instr->opcode == aco_opcode::v_writelane_b32 ||
instr->opcode == aco_opcode::v_writelane_b32_e64) {
check(!op.isLiteral(), "No literal allowed on VALU instruction", instr.get());
check(i == 1 || (op.isTemp() && op.regClass() == v1), "Wrong Operand type for VALU instruction", instr.get());
check(i == 1 || (op.isTemp() && op.regClass().type() == RegType::vgpr && op.bytes() <= 4), "Wrong Operand type for VALU instruction", instr.get());
continue;
}
if (op.isTemp() && instr->operands[i].regClass().type() == RegType::sgpr) {