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softpipe: increase max texture size to 16K

This commit is contained in:
Brian Paul 2010-12-02 10:08:33 -07:00
parent 4b08f35487
commit af4f75c8fe
6 changed files with 73 additions and 23 deletions
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42
src/gallium/drivers/softpipe/sp_limits.h Normal file
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@ -0,0 +1,42 @@
/**************************************************************************
*
* Copyright 2010 VMware, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
**************************************************************************/
#ifndef SP_LIMITS_H
#define SP_LIMITS_H
#define SP_MAX_TEXTURE_2D_LEVELS 15 /* 16K x 16K */
#define SP_MAX_TEXTURE_3D_LEVELS 9 /* 512 x 512 x 512 */
/** Max surface size */
#define MAX_WIDTH (1 << (SP_MAX_TEXTURE_2D_LEVELS - 1))
#define MAX_HEIGHT (1 << (SP_MAX_TEXTURE_2D_LEVELS - 1))
#endif /* SP_LIMITS_H */

3
src/gallium/drivers/softpipe/sp_tex_tile_cache.c
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@ -48,6 +48,9 @@ sp_create_tex_tile_cache( struct pipe_context *pipe )
struct softpipe_tex_tile_cache *tc;
uint pos;
/* make sure max texture size works */
assert((TILE_SIZE << TEX_ADDR_BITS) >= (1 << (SP_MAX_TEXTURE_2D_LEVELS-1)));
tc = CALLOC_STRUCT( softpipe_tex_tile_cache );
if (tc) {
tc->pipe = pipe;

20
src/gallium/drivers/softpipe/sp_tex_tile_cache.h
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@ -30,6 +30,7 @@
#include "pipe/p_compiler.h"
#include "sp_limits.h"
struct softpipe_context;
@ -39,23 +40,26 @@ struct softpipe_tex_tile_cache;
/**
* Cache tile size (width and height). This needs to be a power of two.
*/
#define TILE_SIZE 64
#define TILE_SIZE_LOG2 6
#define TILE_SIZE (1 << TILE_SIZE_LOG2)
/* If we need to support > 4096, just expand this to be a 64 bit
* union, or consider tiling in Z as well.
* XXX or unify z/face?
#define TEX_ADDR_BITS (SP_MAX_TEXTURE_2D_LEVELS - 1 - TILE_SIZE_LOG2)
#define TEX_Z_BITS (SP_MAX_TEXTURE_2D_LEVELS - 1)
/**
* Texture tile address as a union for fast compares.
*/
union tex_tile_address {
struct {
unsigned x:6; /* 4096 / TILE_SIZE */
unsigned y:6; /* 4096 / TILE_SIZE */
unsigned z:12; /* 4096 -- z not tiled */
unsigned x:TEX_ADDR_BITS; /* 16K / TILE_SIZE */
unsigned y:TEX_ADDR_BITS; /* 16K / TILE_SIZE */
unsigned z:TEX_Z_BITS; /* 16K -- z not tiled */
unsigned face:3;
unsigned level:4;
unsigned invalid:1;
} bits;
unsigned value;
uint64_t value;
};

5
src/gallium/drivers/softpipe/sp_texture.h
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@ -30,10 +30,7 @@
#include "pipe/p_state.h"
#define SP_MAX_TEXTURE_2D_LEVELS 13 /* 4K x 4K */
#define SP_MAX_TEXTURE_3D_LEVELS 9 /* 512 x 512 x 512 */
#include "sp_limits.h"
struct pipe_context;

4
src/gallium/drivers/softpipe/sp_tile_cache.c
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@ -92,6 +92,10 @@ sp_create_tile_cache( struct pipe_context *pipe )
maxTexSize = 1 << (maxLevels - 1);
assert(MAX_WIDTH >= maxTexSize);
assert(sizeof(union tile_address) == 4);
assert((TILE_SIZE << TILE_ADDR_BITS) >= MAX_WIDTH);
tc = CALLOC_STRUCT( softpipe_tile_cache );
if (tc) {
tc->pipe = pipe;

22
src/gallium/drivers/softpipe/sp_tile_cache.h
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@ -30,6 +30,7 @@
#include "pipe/p_compiler.h"
#include "sp_texture.h"
struct softpipe_tile_cache;
@ -38,18 +39,22 @@ struct softpipe_tile_cache;
/**
* Cache tile size (width and height). This needs to be a power of two.
*/
#define TILE_SIZE 64
#define TILE_SIZE_LOG2 6
#define TILE_SIZE (1 << TILE_SIZE_LOG2)
/* If we need to support > 4096, just expand this to be a 64 bit
* union, or consider tiling in Z as well.
#define TILE_ADDR_BITS (SP_MAX_TEXTURE_2D_LEVELS - 1 - TILE_SIZE_LOG2)
/**
* Surface tile address as a union for fast compares.
*/
union tile_address {
struct {
unsigned x:6; /* 4096 / TILE_SIZE */
unsigned y:6; /* 4096 / TILE_SIZE */
unsigned x:TILE_ADDR_BITS; /* 16K / TILE_SIZE */
unsigned y:TILE_ADDR_BITS; /* 16K / TILE_SIZE */
unsigned invalid:1;
unsigned pad:19;
unsigned pad:15;
} bits;
unsigned value;
};
@ -70,11 +75,6 @@ struct softpipe_cached_tile
#define NUM_ENTRIES 50
/** XXX move these */
#define MAX_WIDTH 4096
#define MAX_HEIGHT 4096
struct softpipe_tile_cache
{
struct pipe_context *pipe;