mesa: docs: Intel i965 hardware limits.
This should help the next person working on hardware enabling figure out where in the Intel PRMs to find the magic platform hardware values. Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
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@ -25,6 +25,9 @@
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#pragma once
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#include <stdbool.h>
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/**
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* Intel hardware information and quirks
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*/
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struct brw_device_info
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{
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int gen; /**< Generation number: 4, 5, 6, 7, ... */
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@ -66,6 +69,18 @@ struct brw_device_info
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/**
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* \name GPU hardware limits
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*
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* In general, you can find shader thread maximums by looking at the "Maximum
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* Number of Threads" field in the Intel PRM description of the 3DSTATE_VS,
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* 3DSTATE_GS, 3DSTATE_HS, 3DSTATE_DS, and 3DSTATE_PS commands. URB entry
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* limits come from the "Number of URB Entries" field in the the
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* 3DSTATE_URB_VS command and friends.
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*
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* These fields are used to calculate the scratch space to allocate. The
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* amount of scratch space can be larger without being harmful on modern
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* GPUs, however, prior to Haswell, programming the maximum number of threads
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* to greater than the hardware maximum would cause GPU performance to tank.
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*
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* @{
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*/
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/**
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@ -78,18 +93,44 @@ struct brw_device_info
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* to change, so we program @max_cs_threads as the lower maximum.
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*/
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unsigned num_slices;
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unsigned max_vs_threads;
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unsigned max_hs_threads;
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unsigned max_ds_threads;
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unsigned max_gs_threads;
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unsigned max_vs_threads; /**< Maximum Vertex Shader threads */
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unsigned max_hs_threads; /**< Maximum Hull Shader threads */
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unsigned max_ds_threads; /**< Maximum Domain Shader threads */
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unsigned max_gs_threads; /**< Maximum Geometry Shader threads. */
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/**
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* Theoretical maximum number of Pixel Shader threads.
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*
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* PSD means Pixel Shader Dispatcher. On modern Intel GPUs, hardware will
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* automatically scale pixel shader thread count, based on a single value
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* programmed into 3DSTATE_PS.
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*
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* To calculate the maximum number of threads for Gen8 beyond (which have
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* multiple Pixel Shader Dispatchers):
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*
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* - Look up 3DSTATE_PS and find "Maximum Number of Threads Per PSD"
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* - Usually there's only one PSD per subslice, so use the number of
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* subslices for number of PSDs.
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* - For max_wm_threads, the total should be PSD threads * #PSDs.
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*/
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unsigned max_wm_threads;
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/**
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* Maximum Compute Shader threads.
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*
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* Thread count * number of EUs per subslice
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*/
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unsigned max_cs_threads;
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struct {
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/**
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* Hardware default URB size. The units this is expressed in are
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* somewhat inconsistent: 512b units on Gen4-5, KB on Gen6-7, and KB
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* times the slice count on Gen8+.
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* Hardware default URB size.
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*
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* The units this is expressed in are somewhat inconsistent: 512b units
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* on Gen4-5, KB on Gen6-7, and KB times the slice count on Gen8+.
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*
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* Look up "URB Size" in the "Device Attributes" page, and take the
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* maximum. Look up the slice count for each GT SKU on the same page.
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* urb.size = URB Size (kbytes) / slice count
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*/
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unsigned size;
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unsigned min_vs_entries;
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