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nir: Drop the unused instr arg for src/dest copy functions. 

Now that we don't use ralloc, we don't need this arg to get at the right
ralloc ctx.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11776>
This commit is contained in:
Emma Anholt 2021-07-07 11:06:11 -07:00 committed by Marge Bot
parent 879a569884
commit aed4c0b5a9
33 changed files with 72 additions and 80 deletions
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2
src/amd/vulkan/radv_nir_lower_ycbcr_textures.c
View File

@ -132,7 +132,7 @@ create_plane_tex_instr_implicit(struct ycbcr_state *state, uint32_t plane)
}
FALLTHROUGH;
default:
nir_src_copy(&tex->src[i].src, &old_tex->src[i].src, tex);
nir_src_copy(&tex->src[i].src, &old_tex->src[i].src);
break;
}
}

2
src/compiler/glsl/glsl_to_nir.cpp
View File

@ -1635,7 +1635,7 @@ nir_visitor::visit(ir_call *ir)
nir_ssa_def *val = evaluate_rvalue(param_rvalue);
nir_src src = nir_src_for_ssa(val);
nir_src_copy(&call->params[i], &src, call);
nir_src_copy(&call->params[i], &src);
} else if (sig_param->data.mode == ir_var_function_inout) {
unreachable("unimplemented: inout parameters");
}

20
src/compiler/nir/nir.c
View File

@ -342,7 +342,7 @@ nir_function_create(nir_shader *shader, const char *name)
/* NOTE: if the instruction you are copying a src to is already added
* to the IR, use nir_instr_rewrite_src() instead.
*/
void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
void nir_src_copy(nir_src *dest, const nir_src *src)
{
dest->is_ssa = src->is_ssa;
if (src->is_ssa) {
@ -352,14 +352,14 @@ void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
dest->reg.reg = src->reg.reg;
if (src->reg.indirect) {
dest->reg.indirect = malloc(sizeof(nir_src));
nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
nir_src_copy(dest->reg.indirect, src->reg.indirect);
} else {
dest->reg.indirect = NULL;
}
}
}
void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
void nir_dest_copy(nir_dest *dest, const nir_dest *src)
{
/* Copying an SSA definition makes no sense whatsoever. */
assert(!src->is_ssa);
@ -370,17 +370,16 @@ void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
dest->reg.reg = src->reg.reg;
if (src->reg.indirect) {
dest->reg.indirect = malloc(sizeof(nir_src));
nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
nir_src_copy(dest->reg.indirect, src->reg.indirect);
} else {
dest->reg.indirect = NULL;
}
}
void
nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
nir_alu_instr *instr)
nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src)
{
nir_src_copy(&dest->src, &src->src, &instr->instr);
nir_src_copy(&dest->src, &src->src);
dest->abs = src->abs;
dest->negate = src->negate;
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
@ -388,10 +387,9 @@ nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
}
void
nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
nir_alu_instr *instr)
nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src)
{
nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
nir_dest_copy(&dest->dest, &src->dest);
dest->write_mask = src->write_mask;
dest->saturate = src->saturate;
}
@ -1575,7 +1573,7 @@ nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
/* We can't re-write with an SSA def */
assert(!new_dest.is_ssa);
nir_dest_copy(dest, &new_dest, instr);
nir_dest_copy(dest, &new_dest);
dest->reg.parent_instr = instr;
list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);

10
src/compiler/nir/nir.h
View File

@ -1027,8 +1027,8 @@ nir_is_sequential_comp_swizzle(uint8_t *swiz, unsigned nr_comp)
return true;
}
void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
void nir_src_copy(nir_src *dest, const nir_src *src);
void nir_dest_copy(nir_dest *dest, const nir_dest *src);
typedef struct {
/** Base source */
@ -1457,10 +1457,8 @@ typedef struct nir_alu_instr {
nir_alu_src src[];
} nir_alu_instr;
void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
nir_alu_instr *instr);
void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
nir_alu_instr *instr);
void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src);
void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src);
bool nir_alu_instr_is_copy(nir_alu_instr *instr);

4
src/compiler/nir/nir_builtin_builder.c
View File

@ -345,7 +345,7 @@ nir_get_texture_size(nir_builder *b, nir_tex_instr *tex)
tex->src[i].src_type == nir_tex_src_sampler_offset ||
tex->src[i].src_type == nir_tex_src_texture_handle ||
tex->src[i].src_type == nir_tex_src_sampler_handle) {
nir_src_copy(&txs->src[idx].src, &tex->src[i].src, txs);
nir_src_copy(&txs->src[idx].src, &tex->src[i].src);
txs->src[idx].src_type = tex->src[i].src_type;
idx++;
}
@ -400,7 +400,7 @@ nir_get_texture_lod(nir_builder *b, nir_tex_instr *tex)
tex->src[i].src_type == nir_tex_src_sampler_offset ||
tex->src[i].src_type == nir_tex_src_texture_handle ||
tex->src[i].src_type == nir_tex_src_sampler_handle) {
nir_src_copy(&tql->src[idx].src, &tex->src[i].src, tql);
nir_src_copy(&tql->src[idx].src, &tex->src[i].src);
tql->src[idx].src_type = tex->src[i].src_type;
idx++;
}

4
src/compiler/nir/nir_deref.c
View File

@ -709,7 +709,7 @@ rematerialize_deref_in_block(nir_deref_instr *deref,
parent = rematerialize_deref_in_block(parent, state);
new_deref->parent = nir_src_for_ssa(&parent->dest.ssa);
} else {
nir_src_copy(&new_deref->parent, &deref->parent, new_deref);
nir_src_copy(&new_deref->parent, &deref->parent);
}
}
@ -726,7 +726,7 @@ rematerialize_deref_in_block(nir_deref_instr *deref,
case nir_deref_type_array:
case nir_deref_type_ptr_as_array:
assert(!nir_src_as_deref(deref->arr.index));
nir_src_copy(&new_deref->arr.index, &deref->arr.index, new_deref);
nir_src_copy(&new_deref->arr.index, &deref->arr.index);
break;
case nir_deref_type_struct:

2
src/compiler/nir/nir_from_ssa.c
View File

@ -638,7 +638,7 @@ emit_copy(nir_builder *b, nir_src src, nir_src dest_src)
assert(src.reg.reg->num_components >= dest_src.reg.reg->num_components);
nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_mov);
nir_src_copy(&mov->src[0].src, &src, mov);
nir_src_copy(&mov->src[0].src, &src);
mov->dest.dest = nir_dest_for_reg(dest_src.reg.reg);
mov->dest.write_mask = (1 << dest_src.reg.reg->num_components) - 1;

8
src/compiler/nir/nir_lower_alu_to_scalar.c
View File

@ -71,11 +71,11 @@ lower_reduction(nir_alu_instr *alu, nir_op chan_op, nir_op merge_op,
for (int i = num_components - 1; i >= 0; i--) {
nir_alu_instr *chan = nir_alu_instr_create(builder->shader, chan_op);
nir_alu_ssa_dest_init(chan, 1, alu->dest.dest.ssa.bit_size);
nir_alu_src_copy(&chan->src[0], &alu->src[0], chan);
nir_alu_src_copy(&chan->src[0], &alu->src[0]);
chan->src[0].swizzle[0] = chan->src[0].swizzle[i];
if (nir_op_infos[chan_op].num_inputs > 1) {
assert(nir_op_infos[chan_op].num_inputs == 2);
nir_alu_src_copy(&chan->src[1], &alu->src[1], chan);
nir_alu_src_copy(&chan->src[1], &alu->src[1]);
chan->src[1].swizzle[0] = chan->src[1].swizzle[i];
}
chan->exact = alu->exact;
@ -124,7 +124,7 @@ lower_fdot(nir_alu_instr *alu, nir_builder *builder)
builder->shader, prev ? nir_op_ffma : nir_op_fmul);
nir_alu_ssa_dest_init(instr, 1, alu->dest.dest.ssa.bit_size);
for (unsigned j = 0; j < 2; j++) {
nir_alu_src_copy(&instr->src[j], &alu->src[j], instr);
nir_alu_src_copy(&instr->src[j], &alu->src[j]);
instr->src[j].swizzle[0] = alu->src[j].swizzle[i];
}
if (i != num_components - 1)
@ -336,7 +336,7 @@ lower_alu_instr_scalar(nir_builder *b, nir_instr *instr, void *_data)
unsigned src_chan = (nir_op_infos[alu->op].input_sizes[i] == 1 ?
0 : chan);
nir_alu_src_copy(&lower->src[i], &alu->src[i], lower);
nir_alu_src_copy(&lower->src[i], &alu->src[i]);
for (int j = 0; j < NIR_MAX_VEC_COMPONENTS; j++)
lower->src[i].swizzle[j] = alu->dest.write_mask & (1 << chan) ?
alu->src[i].swizzle[src_chan] : 0;

12
src/compiler/nir/nir_lower_atomics_to_ssbo.c
View File

@ -99,7 +99,7 @@ lower_instr(nir_intrinsic_instr *instr, unsigned ssbo_offset, nir_builder *b)
/* remapped to ssbo_atomic_add: { buffer_idx, offset, +1 } */
temp = nir_imm_int(b, +1);
new_instr->src[0] = nir_src_for_ssa(buffer);
nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr);
nir_src_copy(&new_instr->src[1], &instr->src[0]);
new_instr->src[2] = nir_src_for_ssa(temp);
break;
case nir_intrinsic_atomic_counter_pre_dec:
@ -108,22 +108,22 @@ lower_instr(nir_intrinsic_instr *instr, unsigned ssbo_offset, nir_builder *b)
/* NOTE semantic difference so we adjust the return value below */
temp = nir_imm_int(b, -1);
new_instr->src[0] = nir_src_for_ssa(buffer);
nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr);
nir_src_copy(&new_instr->src[1], &instr->src[0]);
new_instr->src[2] = nir_src_for_ssa(temp);
break;
case nir_intrinsic_atomic_counter_read:
/* remapped to load_ssbo: { buffer_idx, offset } */
new_instr->src[0] = nir_src_for_ssa(buffer);
nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr);
nir_src_copy(&new_instr->src[1], &instr->src[0]);
break;
default:
/* remapped to ssbo_atomic_x: { buffer_idx, offset, data, (compare)? } */
new_instr->src[0] = nir_src_for_ssa(buffer);
nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr);
nir_src_copy(&new_instr->src[2], &instr->src[1], new_instr);
nir_src_copy(&new_instr->src[1], &instr->src[0]);
nir_src_copy(&new_instr->src[2], &instr->src[1]);
if (op == nir_intrinsic_ssbo_atomic_comp_swap ||
op == nir_intrinsic_ssbo_atomic_fcomp_swap)
nir_src_copy(&new_instr->src[3], &instr->src[2], new_instr);
nir_src_copy(&new_instr->src[3], &instr->src[2]);
break;
}

2
src/compiler/nir/nir_lower_bit_size.c
View File

@ -38,7 +38,7 @@ static nir_ssa_def *convert_to_bit_size(nir_builder *bld, nir_ssa_def *src,
if ((type & (nir_type_uint | nir_type_int)) && bit_size == 32 &&
alu && (alu->op == nir_op_b2i8 || alu->op == nir_op_b2i16)) {
nir_alu_instr *instr = nir_alu_instr_create(bld->shader, nir_op_b2i32);
nir_alu_src_copy(&instr->src[0], &alu->src[0], instr);
nir_alu_src_copy(&instr->src[0], &alu->src[0]);
return nir_builder_alu_instr_finish_and_insert(bld, instr);
}

2
src/compiler/nir/nir_lower_indirect_derefs.c
View File

@ -98,7 +98,7 @@ emit_load_store_deref(nir_builder *b, nir_intrinsic_instr *orig_instr,
/* Copy over any other sources. This is needed for interp_deref_at */
for (unsigned i = 1;
i < nir_intrinsic_infos[orig_instr->intrinsic].num_srcs; i++)
nir_src_copy(&load->src[i], &orig_instr->src[i], load);
nir_src_copy(&load->src[i], &orig_instr->src[i]);
nir_ssa_dest_init(&load->instr, &load->dest,
orig_instr->dest.ssa.num_components,

2
src/compiler/nir/nir_lower_io.c
View File

@ -554,7 +554,7 @@ lower_interpolate_at(nir_intrinsic_instr *intrin, struct lower_io_state *state,
if (intrin->intrinsic == nir_intrinsic_interp_deref_at_sample ||
intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
intrin->intrinsic == nir_intrinsic_interp_deref_at_vertex)
nir_src_copy(&bary_setup->src[0], &intrin->src[1], bary_setup);
nir_src_copy(&bary_setup->src[0], &intrin->src[1]);
nir_builder_instr_insert(b, &bary_setup->instr);

6
src/compiler/nir/nir_lower_io_arrays_to_elements.c
View File

@ -181,8 +181,7 @@ lower_array(nir_builder *b, nir_intrinsic_instr *intr, nir_variable *var,
if (intr->intrinsic == nir_intrinsic_interp_deref_at_offset ||
intr->intrinsic == nir_intrinsic_interp_deref_at_sample ||
intr->intrinsic == nir_intrinsic_interp_deref_at_vertex) {
nir_src_copy(&element_intr->src[1], &intr->src[1],
&element_intr->instr);
nir_src_copy(&element_intr->src[1], &intr->src[1]);
}
nir_ssa_def_rewrite_uses(&intr->dest.ssa,
@ -190,8 +189,7 @@ lower_array(nir_builder *b, nir_intrinsic_instr *intr, nir_variable *var,
} else {
nir_intrinsic_set_write_mask(element_intr,
nir_intrinsic_write_mask(intr));
nir_src_copy(&element_intr->src[1], &intr->src[1],
&element_intr->instr);
nir_src_copy(&element_intr->src[1], &intr->src[1]);
}
nir_builder_instr_insert(b, &element_intr->instr);

6
src/compiler/nir/nir_lower_io_to_scalar.c
View File

@ -52,7 +52,7 @@ lower_load_input_to_scalar(nir_builder *b, nir_intrinsic_instr *intr)
nir_intrinsic_set_dest_type(chan_intr, nir_intrinsic_dest_type(intr));
nir_intrinsic_set_io_semantics(chan_intr, nir_intrinsic_io_semantics(intr));
/* offset */
nir_src_copy(&chan_intr->src[0], &intr->src[0], chan_intr);
nir_src_copy(&chan_intr->src[0], &intr->src[0]);
nir_builder_instr_insert(b, &chan_intr->instr);
@ -88,7 +88,7 @@ lower_store_output_to_scalar(nir_builder *b, nir_intrinsic_instr *intr)
/* value */
chan_intr->src[0] = nir_src_for_ssa(nir_channel(b, value, i));
/* offset */
nir_src_copy(&chan_intr->src[1], &intr->src[1], chan_intr);
nir_src_copy(&chan_intr->src[1], &intr->src[1]);
nir_builder_instr_insert(b, &chan_intr->instr);
}
@ -222,7 +222,7 @@ lower_load_to_scalar_early(nir_builder *b, nir_intrinsic_instr *intr,
if (intr->intrinsic == nir_intrinsic_interp_deref_at_offset ||
intr->intrinsic == nir_intrinsic_interp_deref_at_sample ||
intr->intrinsic == nir_intrinsic_interp_deref_at_vertex)
nir_src_copy(&chan_intr->src[1], &intr->src[1], &chan_intr->instr);
nir_src_copy(&chan_intr->src[1], &intr->src[1]);
nir_builder_instr_insert(b, &chan_intr->instr);

4
src/compiler/nir/nir_lower_locals_to_regs.c
View File

@ -208,7 +208,7 @@ lower_locals_to_regs_block(nir_block *block,
nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
&mov->dest.dest.ssa);
} else {
nir_dest_copy(&mov->dest.dest, &intrin->dest, &mov->instr);
nir_dest_copy(&mov->dest.dest, &intrin->dest);
}
nir_builder_instr_insert(b, &mov->instr);
@ -227,7 +227,7 @@ lower_locals_to_regs_block(nir_block *block,
nir_src reg_src = get_deref_reg_src(deref, state);
nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_mov);
nir_src_copy(&mov->src[0].src, &intrin->src[1], mov);
nir_src_copy(&mov->src[0].src, &intrin->src[1]);
mov->dest.write_mask = nir_intrinsic_write_mask(intrin);
mov->dest.dest.is_ssa = false;
mov->dest.dest.reg.reg = reg_src.reg.reg;

2
src/compiler/nir/nir_lower_phis_to_scalar.c
View File

@ -239,7 +239,7 @@ lower_phis_to_scalar_block(nir_block *block,
nir_op_mov);
nir_ssa_dest_init(&mov->instr, &mov->dest.dest, 1, bit_size, NULL);
mov->dest.write_mask = 1;
nir_src_copy(&mov->src[0].src, &src->src, &mov->instr);
nir_src_copy(&mov->src[0].src, &src->src);
mov->src[0].swizzle[0] = i;
/* Insert at the end of the predecessor but before the jump */

8
src/compiler/nir/nir_lower_ssbo.c
View File

@ -90,7 +90,7 @@ nir_load_ssbo_prop(nir_builder *b, nir_intrinsic_op op,
{
nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, op);
load->num_components = 1;
nir_src_copy(&load->src[0], idx, load);
nir_src_copy(&load->src[0], idx);
nir_ssa_dest_init(&load->instr, &load->dest, 1, bitsize, NULL);
nir_builder_instr_insert(b, &load->instr);
return &load->dest.ssa;
@ -134,7 +134,7 @@ lower_ssbo_instr(nir_builder *b, nir_intrinsic_instr *intr)
}
if (is_store) {
nir_src_copy(&global->src[0], &intr->src[0], global);
nir_src_copy(&global->src[0], &intr->src[0]);
nir_intrinsic_set_write_mask(global, nir_intrinsic_write_mask(intr));
} else {
nir_ssa_dest_init(&global->instr, &global->dest,
@ -142,9 +142,9 @@ lower_ssbo_instr(nir_builder *b, nir_intrinsic_instr *intr)
intr->dest.ssa.bit_size, NULL);
if (is_atomic) {
nir_src_copy(&global->src[1], &intr->src[2], global);
nir_src_copy(&global->src[1], &intr->src[2]);
if (nir_intrinsic_infos[op].num_srcs > 2)
nir_src_copy(&global->src[2], &intr->src[3], global);
nir_src_copy(&global->src[2], &intr->src[3]);
}
}

10
src/compiler/nir/nir_lower_subgroups.c
View File

@ -45,7 +45,7 @@ lower_subgroups_64bit_split_intrinsic(nir_builder *b, nir_intrinsic_instr *intri
intr->const_index[1] = intrin->const_index[1];
intr->src[0] = nir_src_for_ssa(comp);
if (nir_intrinsic_infos[intrin->intrinsic].num_srcs == 2)
nir_src_copy(&intr->src[1], &intrin->src[1], intr);
nir_src_copy(&intr->src[1], &intrin->src[1]);
intr->num_components = 1;
nir_builder_instr_insert(b, &intr->instr);
@ -126,7 +126,7 @@ lower_subgroup_op_to_scalar(nir_builder *b, nir_intrinsic_instr *intrin,
/* invocation */
if (nir_intrinsic_infos[intrin->intrinsic].num_srcs > 1) {
assert(nir_intrinsic_infos[intrin->intrinsic].num_srcs == 2);
nir_src_copy(&chan_intrin->src[1], &intrin->src[1], chan_intrin);
nir_src_copy(&chan_intrin->src[1], &intrin->src[1]);
}
chan_intrin->const_index[0] = intrin->const_index[0];
@ -209,7 +209,7 @@ lower_shuffle_to_swizzle(nir_builder *b, nir_intrinsic_instr *intrin,
nir_intrinsic_instr *swizzle = nir_intrinsic_instr_create(
b->shader, nir_intrinsic_masked_swizzle_amd);
swizzle->num_components = intrin->num_components;
nir_src_copy(&swizzle->src[0], &intrin->src[0], swizzle);
nir_src_copy(&swizzle->src[0], &intrin->src[0]);
nir_intrinsic_set_swizzle_mask(swizzle, (mask << 10) | 0x1f);
nir_ssa_dest_init(&swizzle->instr, &swizzle->dest,
intrin->dest.ssa.num_components,
@ -286,7 +286,7 @@ lower_shuffle(nir_builder *b, nir_intrinsic_instr *intrin,
nir_intrinsic_instr *shuffle =
nir_intrinsic_instr_create(b->shader, nir_intrinsic_shuffle);
shuffle->num_components = intrin->num_components;
nir_src_copy(&shuffle->src[0], &intrin->src[0], shuffle);
nir_src_copy(&shuffle->src[0], &intrin->src[0]);
shuffle->src[1] = nir_src_for_ssa(index);
nir_ssa_dest_init(&shuffle->instr, &shuffle->dest,
intrin->dest.ssa.num_components,
@ -489,7 +489,7 @@ lower_dynamic_quad_broadcast(nir_builder *b, nir_intrinsic_instr *intrin,
qbcst->num_components = intrin->num_components;
qbcst->src[1] = nir_src_for_ssa(nir_imm_int(b, i));
nir_src_copy(&qbcst->src[0], &intrin->src[0], qbcst);
nir_src_copy(&qbcst->src[0], &intrin->src[0]);
nir_ssa_dest_init(&qbcst->instr, &qbcst->dest,
intrin->dest.ssa.num_components,
intrin->dest.ssa.bit_size, NULL);

8
src/compiler/nir/nir_lower_tex.c
View File

@ -289,7 +289,7 @@ sample_plane(nir_builder *b, nir_tex_instr *tex, int plane,
nir_tex_instr *plane_tex =
nir_tex_instr_create(b->shader, tex->num_srcs + 1);
for (unsigned i = 0; i < tex->num_srcs; i++) {
nir_src_copy(&plane_tex->src[i].src, &tex->src[i].src, plane_tex);
nir_src_copy(&plane_tex->src[i].src, &tex->src[i].src);
plane_tex->src[i].src_type = tex->src[i].src_type;
}
plane_tex->src[tex->num_srcs].src = nir_src_for_ssa(nir_imm_int(b, plane));
@ -770,7 +770,7 @@ lower_tex_to_txd(nir_builder *b, nir_tex_instr *tex)
/* reuse existing srcs */
for (unsigned i = 0; i < tex->num_srcs; i++) {
nir_src_copy(&txd->src[i].src, &tex->src[i].src, txd);
nir_src_copy(&txd->src[i].src, &tex->src[i].src);
txd->src[i].src_type = tex->src[i].src_type;
}
int coord = nir_tex_instr_src_index(tex, nir_tex_src_coord);
@ -807,7 +807,7 @@ lower_txb_to_txl(nir_builder *b, nir_tex_instr *tex)
/* reuse all but bias src */
for (int i = 0; i < 2; i++) {
if (tex->src[i].src_type != nir_tex_src_bias) {
nir_src_copy(&txl->src[i].src, &tex->src[i].src, txl);
nir_src_copy(&txl->src[i].src, &tex->src[i].src);
txl->src[i].src_type = tex->src[i].src_type;
}
}
@ -1097,7 +1097,7 @@ lower_tg4_offsets(nir_builder *b, nir_tex_instr *tex)
tex_copy->dest_type = tex->dest_type;
for (unsigned j = 0; j < tex->num_srcs; ++j) {
nir_src_copy(&tex_copy->src[j].src, &tex->src[j].src, tex_copy);
nir_src_copy(&tex_copy->src[j].src, &tex->src[j].src);
tex_copy->src[j].src_type = tex->src[j].src_type;
}

4
src/compiler/nir/nir_lower_vec_to_movs.c
View File

@ -68,8 +68,8 @@ insert_mov(nir_alu_instr *vec, unsigned start_idx, nir_shader *shader)
return 1 << start_idx;
nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_mov);
nir_alu_src_copy(&mov->src[0], &vec->src[start_idx], mov);
nir_alu_dest_copy(&mov->dest, &vec->dest, mov);
nir_alu_src_copy(&mov->src[0], &vec->src[start_idx]);
nir_alu_dest_copy(&mov->dest, &vec->dest);
mov->dest.write_mask = (1u << start_idx);
mov->src[0].swizzle[start_idx] = vec->src[start_idx].swizzle[0];

4
src/compiler/nir/nir_opt_peephole_select.c
View File

@ -455,7 +455,7 @@ nir_opt_peephole_select_block(nir_block *block, nir_shader *shader,
nir_phi_instr *phi = nir_instr_as_phi(instr);
nir_alu_instr *sel = nir_alu_instr_create(shader, nir_op_bcsel);
nir_src_copy(&sel->src[0].src, &if_stmt->condition, sel);
nir_src_copy(&sel->src[0].src, &if_stmt->condition);
/* Splat the condition to all channels */
memset(sel->src[0].swizzle, 0, sizeof sel->src[0].swizzle);
@ -465,7 +465,7 @@ nir_opt_peephole_select_block(nir_block *block, nir_shader *shader,
assert(src->src.is_ssa);
unsigned idx = src->pred == then_block ? 1 : 2;
nir_src_copy(&sel->src[idx].src, &src->src, sel);
nir_src_copy(&sel->src[idx].src, &src->src);
}
nir_ssa_dest_init(&sel->instr, &sel->dest.dest,

3
src/compiler/nir/nir_opt_undef.c
View File

@ -56,8 +56,7 @@ opt_undef_csel(nir_alu_instr *instr)
*/
nir_instr_rewrite_src(&instr->instr, &instr->src[0].src,
instr->src[i == 1 ? 2 : 1].src);
nir_alu_src_copy(&instr->src[0], &instr->src[i == 1 ? 2 : 1],
instr);
nir_alu_src_copy(&instr->src[0], &instr->src[i == 1 ? 2 : 1]);
nir_src empty_src;
memset(&empty_src, 0, sizeof(empty_src));

3
src/compiler/nir/nir_search.c
View File

@ -524,8 +524,7 @@ construct_value(nir_builder *build,
assert(state->variables_seen & (1 << var->variable));
nir_alu_src val = { NIR_SRC_INIT };
nir_alu_src_copy(&val, &state->variables[var->variable],
(void *)build->shader);
nir_alu_src_copy(&val, &state->variables[var->variable]);
assert(!var->is_constant);
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)

2
src/freedreno/ir3/ir3_nir_lower_tg4_to_tex.c
View File

@ -54,7 +54,7 @@ ir3_nir_lower_tg4_to_tex_instr(nir_builder *b, nir_instr *instr, void *data)
tex->dest_type = tg4->dest_type;
for (int j = 0; j < tg4->num_srcs; j++) {
nir_src_copy(&tex->src[j].src, &tg4->src[j].src, tex);
nir_src_copy(&tex->src[j].src, &tg4->src[j].src);
tex->src[j].src_type = tg4->src[j].src_type;
}
if (i != 3) {

2
src/gallium/drivers/d3d12/d3d12_lower_int_cubemap_to_array.c
View File

@ -131,7 +131,7 @@ create_array_tex_from_cube_tex(nir_builder *b, nir_tex_instr *tex, nir_ssa_def *
nir_src *psrc = (tex->src[i].src_type == nir_tex_src_coord) ?
&coord_src : &tex->src[i].src;
nir_src_copy(&array_tex->src[i].src, psrc, array_tex);
nir_src_copy(&array_tex->src[i].src, psrc);
array_tex->src[i].src_type = tex->src[i].src_type;
}

2
src/gallium/drivers/etnaviv/etnaviv_compiler_nir.c
View File

@ -687,7 +687,7 @@ insert_vec_mov(nir_alu_instr *vec, unsigned start_idx, nir_shader *shader)
unsigned write_mask = (1u << start_idx);
nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_mov);
nir_alu_src_copy(&mov->src[0], &vec->src[start_idx], mov);
nir_alu_src_copy(&mov->src[0], &vec->src[start_idx]);
mov->src[0].swizzle[0] = vec->src[start_idx].swizzle[0];
mov->src[0].negate = vec->src[start_idx].negate;

2
src/gallium/drivers/lima/ir/lima_nir_split_load_input.c
View File

@ -81,7 +81,7 @@ lima_nir_split_load_input_block(nir_block *block, nir_builder *b)
nir_intrinsic_set_dest_type(new_intrin, nir_intrinsic_dest_type(intrin));
/* offset */
nir_src_copy(&new_intrin->src[0], &intrin->src[0], new_intrin);
nir_src_copy(&new_intrin->src[0], &intrin->src[0]);
nir_builder_instr_insert(b, &new_intrin->instr);
nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa,

2
src/gallium/drivers/r600/sfn/sfn_nir_vectorize_vs_inputs.c
View File

@ -159,7 +159,7 @@ r600_create_new_load(nir_builder *b, nir_intrinsic_instr *intr, nir_variable *va
if (intr->intrinsic == nir_intrinsic_interp_deref_at_offset ||
intr->intrinsic == nir_intrinsic_interp_deref_at_sample)
nir_src_copy(&new_intr->src[1], &intr->src[1], &new_intr->instr);
nir_src_copy(&new_intr->src[1], &intr->src[1]);
nir_builder_instr_insert(b, &new_intr->instr);

2
src/gallium/drivers/zink/nir_lower_dynamic_bo_access.c
View File

@ -49,7 +49,7 @@ recursive_generate_bo_ssa_def(nir_builder *b, nir_intrinsic_instr *instr, nir_ss
new_instr->src[0] = nir_src_for_ssa(nir_imm_int(b, start));
for (unsigned i = 0; i < nir_intrinsic_infos[instr->intrinsic].num_srcs; i++) {
if (i)
nir_src_copy(&new_instr->src[i], &instr->src[i], &new_instr->instr);
nir_src_copy(&new_instr->src[i], &instr->src[i]);
}
if (instr->intrinsic != nir_intrinsic_load_ubo_vec4) {
nir_intrinsic_set_align(new_instr, nir_intrinsic_align_mul(instr), nir_intrinsic_align_offset(instr));

2
src/intel/compiler/brw_nir_opt_peephole_ffma.c
View File

@ -244,7 +244,7 @@ brw_nir_opt_peephole_ffma_block(nir_builder *b, nir_block *block)
for (unsigned j = 0; j < add->dest.dest.ssa.num_components; j++)
ffma->src[i].swizzle[j] = mul->src[i].swizzle[swizzle[j]];
}
nir_alu_src_copy(&ffma->src[2], &add->src[1 - add_mul_src], ffma);
nir_alu_src_copy(&ffma->src[2], &add->src[1 - add_mul_src]);
assert(add->dest.dest.is_ssa);

2
src/intel/vulkan/anv_nir_lower_ycbcr_textures.c
View File

@ -135,7 +135,7 @@ create_plane_tex_instr_implicit(struct ycbcr_state *state,
}
FALLTHROUGH;
default:
nir_src_copy(&tex->src[i].src, &old_tex->src[i].src, tex);
nir_src_copy(&tex->src[i].src, &old_tex->src[i].src);
break;
}
}

6
src/microsoft/compiler/dxil_nir_lower_int_samplers.c
View File

@ -81,7 +81,7 @@ dx_get_texture_lod(nir_builder *b, nir_tex_instr *tex)
nir_ssa_def *ssa_src = nir_channels(b, tex->src[coord_index].src.ssa,
(1 << coord_components) - 1);
nir_src src = nir_src_for_ssa(ssa_src);
nir_src_copy(&tql->src[0].src, &src, tql);
nir_src_copy(&tql->src[0].src, &src);
tql->src[0].src_type = nir_tex_src_coord;
unsigned idx = 1;
@ -92,7 +92,7 @@ dx_get_texture_lod(nir_builder *b, nir_tex_instr *tex)
tex->src[i].src_type == nir_tex_src_sampler_offset ||
tex->src[i].src_type == nir_tex_src_texture_handle ||
tex->src[i].src_type == nir_tex_src_sampler_handle) {
nir_src_copy(&tql->src[idx].src, &tex->src[i].src, tql);
nir_src_copy(&tql->src[idx].src, &tex->src[i].src);
tql->src[idx].src_type = tex->src[i].src_type;
idx++;
}
@ -278,7 +278,7 @@ create_txf_from_tex(nir_builder *b, nir_tex_instr *tex)
if (tex->src[i].src_type == nir_tex_src_texture_deref ||
tex->src[i].src_type == nir_tex_src_texture_offset ||
tex->src[i].src_type == nir_tex_src_texture_handle) {
nir_src_copy(&txf->src[idx].src, &tex->src[i].src, txf);
nir_src_copy(&txf->src[idx].src, &tex->src[i].src);
txf->src[idx].src_type = tex->src[i].src_type;
idx++;
}

2
src/panfrost/midgard/midgard_errata_lod.c
View File

@ -53,7 +53,7 @@ nir_lod_errata_instr(nir_builder *b, nir_instr *instr, void *data)
/* TODO: Indirect samplers, separate sampler objects XXX */
nir_src idx = nir_src_for_ssa(nir_imm_int(b, tex->texture_index));
nir_src_copy(&l->src[0], &idx, l);
nir_src_copy(&l->src[0], &idx);
nir_builder_instr_insert(b, &l->instr);
nir_ssa_def *params = &l->dest.ssa;