intel/genxml: add missing MI_PREDICATE compare operations

Doesn't save us a great deal of lines but at least they get decoded in
aubinators.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
This commit is contained in:
Lionel Landwerlin 2019-01-18 16:12:06 +00:00
parent 79514cc5fb
commit ad99c1670a
7 changed files with 12 additions and 1 deletions

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@ -3047,6 +3047,8 @@
<value name="XOR" value="3"/>
</field>
<field name="Compare Operation" start="0" end="1" type="uint" prefix="COMPARE">
<value name="TRUE" value="0"/>
<value name="FALSE" value="1"/>
<value name="SRCS_EQUAL" value="2"/>
<value name="DELTAS_EQUAL" value="3"/>
</field>

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@ -3042,6 +3042,8 @@
<value name="XOR" value="3"/>
</field>
<field name="Compare Operation" start="0" end="1" type="uint" prefix="COMPARE">
<value name="TRUE" value="0"/>
<value name="FALSE" value="1"/>
<value name="SRCS_EQUAL" value="2"/>
<value name="DELTAS_EQUAL" value="3"/>
</field>

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@ -2051,6 +2051,8 @@
<value name="XOR" value="3"/>
</field>
<field name="Compare Operation" start="0" end="1" type="uint" prefix="COMPARE">
<value name="TRUE" value="0"/>
<value name="FALSE" value="1"/>
<value name="SRCS_EQUAL" value="2"/>
<value name="DELTAS_EQUAL" value="3"/>
</field>

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@ -2462,6 +2462,8 @@
<value name="XOR" value="3"/>
</field>
<field name="Compare Operation" start="0" end="1" type="uint" prefix="COMPARE">
<value name="TRUE" value="0"/>
<value name="FALSE" value="1"/>
<value name="SRCS_EQUAL" value="2"/>
<value name="DELTAS_EQUAL" value="3"/>
</field>

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@ -2690,6 +2690,8 @@
<value name="XOR" value="3"/>
</field>
<field name="Compare Operation" start="0" end="1" type="uint" prefix="COMPARE">
<value name="TRUE" value="0"/>
<value name="FALSE" value="1"/>
<value name="SRCS_EQUAL" value="2"/>
<value name="DELTAS_EQUAL" value="3"/>
</field>

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@ -2973,6 +2973,8 @@
<value name="XOR" value="3"/>
</field>
<field name="Compare Operation" start="0" end="1" type="uint" prefix="COMPARE">
<value name="TRUE" value="0"/>
<value name="FALSE" value="1"/>
<value name="SRCS_EQUAL" value="2"/>
<value name="DELTAS_EQUAL" value="3"/>
</field>

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@ -3568,7 +3568,6 @@ void genX(CmdDispatchIndirect)(
}
/* predicate = !predicate; */
#define COMPARE_FALSE 1
anv_batch_emit(batch, GENX(MI_PREDICATE), mip) {
mip.LoadOperation = LOAD_LOADINV;
mip.CombineOperation = COMBINE_OR;