diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 1e4ac2de100..a013d58db9a 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -5149,38 +5149,22 @@ radv_cmd_buffer_begin_subpass(struct radv_cmd_buffer *cmd_buffer, uint32_t subpa }; /* Copy the VRS rates to the HTILE buffer. */ - radv_copy_vrs_htile(cmd_buffer, vrs_iview->image, &extent, ds_iview->image); + radv_copy_vrs_htile(cmd_buffer, vrs_iview->image, &extent, ds_iview->image, true); } else { /* When a subpass uses a VRS attachment without binding a depth/stencil attachment, we have * to copy the VRS rates to our internal HTILE buffer. */ struct radv_framebuffer *fb = cmd_buffer->state.framebuffer; struct radv_image *ds_image = radv_cmd_buffer_get_vrs_image(cmd_buffer); - uint32_t htile_value; if (ds_image) { - htile_value = radv_get_htile_initial_value(cmd_buffer->device, ds_image); - VkExtent2D extent = { .width = MIN2(fb->width, ds_image->info.width), .height = MIN2(fb->height, ds_image->info.height), }; - /* Clear the HTILE buffer before copying VRS rates because it's a read-modify-write - * operation. - */ - VkImageSubresourceRange range = { - .aspectMask = VK_IMAGE_ASPECT_DEPTH_BIT, - .baseMipLevel = 0, - .levelCount = 1, - .baseArrayLayer = 0, - .layerCount = 1, - }; - - cmd_buffer->state.flush_bits |= radv_clear_htile(cmd_buffer, ds_image, &range, htile_value); - /* Copy the VRS rates to the HTILE buffer. */ - radv_copy_vrs_htile(cmd_buffer, vrs_iview->image, &extent, ds_image); + radv_copy_vrs_htile(cmd_buffer, vrs_iview->image, &extent, ds_image, false); } } } diff --git a/src/amd/vulkan/radv_meta.h b/src/amd/vulkan/radv_meta.h index 54ce4fb1608..30c5652dc73 100644 --- a/src/amd/vulkan/radv_meta.h +++ b/src/amd/vulkan/radv_meta.h @@ -220,7 +220,7 @@ void radv_retile_dcc(struct radv_cmd_buffer *cmd_buffer, struct radv_image *imag void radv_expand_fmask_image_inplace(struct radv_cmd_buffer *cmd_buffer, struct radv_image *image, const VkImageSubresourceRange *subresourceRange); void radv_copy_vrs_htile(struct radv_cmd_buffer *cmd_buffer, struct radv_image *vrs_image, - VkExtent2D *extent, struct radv_image *dst_image); + VkExtent2D *extent, struct radv_image *dst_image, bool read_htile_value); void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image, VkFormat src_format, diff --git a/src/amd/vulkan/radv_meta_copy_vrs_htile.c b/src/amd/vulkan/radv_meta_copy_vrs_htile.c index 4f5e78be8e1..aa5d5848e69 100644 --- a/src/amd/vulkan/radv_meta_copy_vrs_htile.c +++ b/src/amd/vulkan/radv_meta_copy_vrs_htile.c @@ -220,7 +220,7 @@ fail: void radv_copy_vrs_htile(struct radv_cmd_buffer *cmd_buffer, struct radv_image *vrs_image, - VkExtent2D *extent, struct radv_image *dst_image) + VkExtent2D *extent, struct radv_image *dst_image, bool read_htile_value) { struct radv_device *device = cmd_buffer->device; struct radv_meta_state *state = &device->meta_state; @@ -298,7 +298,7 @@ radv_copy_vrs_htile(struct radv_cmd_buffer *cmd_buffer, struct radv_image *vrs_i const unsigned constants[3] = { dst_image->planes[0].surface.meta_pitch, dst_image->planes[0].surface.meta_slice_size, - true, + read_htile_value, }; radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), state->copy_vrs_htile_p_layout,