panfrost: Disable shader-assisted indirect draws
Although it is passing all of dEQP-GLES31, it is failing a few KHR-GLES31.* tests. It also has performance issues at the moment. Invert the existing noindirect debug flag to become a indirect debug flag. Set this flag for dEQP-GLES31 CI on G52, to make sure the code doesn't bit rot on the hope someone will pick this up later on. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12478>
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@ -154,7 +154,7 @@ panfrost-g52-gles31:arm64:
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- .lava-meson-g12b-a311d-khadas-vim3
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variables:
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DEQP_VER: gles31
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PAN_MESA_DEBUG: "deqp,sync"
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PAN_MESA_DEBUG: "deqp,sync,indirect"
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DEQP_PARALLEL: 6
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DEQP_EXPECTED_RENDERER: G52
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@ -2998,8 +2998,8 @@ panfrost_draw_vbo(struct pipe_context *pipe,
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if (!panfrost_render_condition_check(ctx))
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return;
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/* Emulate indirect draws when debugging */
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if (dev->debug & PAN_DBG_NOINDIRECT && indirect && indirect->buffer) {
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/* Emulate indirect draws unless we're using the experimental path */
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if (!(dev->debug & PAN_DBG_INDIRECT) && indirect && indirect->buffer) {
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assert(num_draws == 1);
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util_draw_indirect(pipe, info, indirect);
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return;
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@ -68,7 +68,7 @@ static const struct debug_named_value panfrost_debug_options[] = {
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{"noafbc", PAN_DBG_NO_AFBC, "Disable AFBC support"},
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{"nocrc", PAN_DBG_NO_CRC, "Disable transaction elimination"},
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{"msaa16", PAN_DBG_MSAA16, "Enable MSAA 8x and 16x support"},
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{"noindirect", PAN_DBG_NOINDIRECT, "Emulate indirect draws on the CPU"},
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{"indirect", PAN_DBG_INDIRECT, "Use experimental compute kernel for indirect draws"},
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{"linear", PAN_DBG_LINEAR, "Force linear textures"},
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{"nocache", PAN_DBG_NO_CACHE, "Disable BO cache"},
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DEBUG_NAMED_VALUE_END
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@ -840,10 +840,6 @@ panfrost_create_screen(int fd, struct renderonly *ro)
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if (dev->arch == 7)
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dev->quirks |= MIDGARD_NO_AFBC;
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/* XXX: Indirect draws on Midgard need debugging, emulate for now */
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if (dev->arch < 6)
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dev->debug |= PAN_DBG_NOINDIRECT;
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dev->ro = ro;
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/* Check if we're loading against a supported GPU model. */
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@ -43,7 +43,7 @@
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#define PAN_DBG_GL3 0x0100
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#define PAN_DBG_NO_AFBC 0x0200
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#define PAN_DBG_MSAA16 0x0400
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#define PAN_DBG_NOINDIRECT 0x0800
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#define PAN_DBG_INDIRECT 0x0800
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#define PAN_DBG_LINEAR 0x1000
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#define PAN_DBG_NO_CACHE 0x2000
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