freedreno/ir3: lower phi webs to regs
nir's from_ssa pass is much better at avoiding inserting extra moves than our logic is. And lowering phi webs to regs just treats anything involved in a phi web as an array of length=1. Which with previous array related fixes in RA/etc ends up working out quite well. This cuts down on extra instructions and also helps with register pressure. Signed-off-by: Rob Clark <robdclark@gmail.com>
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@ -194,6 +194,7 @@ compile_init(struct ir3_compiler *compiler,
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* in ir3_optimize_nir():
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* in ir3_optimize_nir():
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*/
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*/
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NIR_PASS_V(ctx->s, nir_lower_locals_to_regs);
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NIR_PASS_V(ctx->s, nir_lower_locals_to_regs);
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NIR_PASS_V(ctx->s, nir_convert_from_ssa, true);
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if (fd_mesa_debug & FD_DBG_DISASM) {
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if (fd_mesa_debug & FD_DBG_DISASM) {
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DBG("dump nir%dv%d: type=%d, k={bp=%u,cts=%u,hp=%u}",
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DBG("dump nir%dv%d: type=%d, k={bp=%u,cts=%u,hp=%u}",
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@ -907,8 +908,6 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
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return;
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return;
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}
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}
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compile_assert(ctx, alu->dest.dest.is_ssa);
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/* General case: We can just grab the one used channel per src. */
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/* General case: We can just grab the one used channel per src. */
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for (int i = 0; i < info->num_inputs; i++) {
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for (int i = 0; i < info->num_inputs; i++) {
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unsigned chan = ffs(alu->dest.write_mask) - 1;
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unsigned chan = ffs(alu->dest.write_mask) - 1;
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