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iris: Split aux map initialization from invalidation. 

We can write the aux map address only once during the batch
initialization, and then only invalidate it once we modify it.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4005>
This commit is contained in:
Rafael Antognolli 2020-02-25 15:04:08 -08:00 committed by Marge Bot
parent 43dc842cb9
commit a7de6f1321
3 changed files with 34 additions and 9 deletions
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2
src/gallium/drivers/iris/iris_blorp.c
View File

@ -302,7 +302,7 @@ iris_blorp_exec(struct blorp_batch *blorp_batch,
}
#if GEN_GEN >= 12
genX(emit_aux_map_state)(batch);
genX(invalidate_aux_map_state)(batch);
#endif
iris_handle_always_flush_cache(batch);

2
src/gallium/drivers/iris/iris_genx_protos.h
View File

@ -37,7 +37,7 @@ void genX(update_pma_fix)(struct iris_context *ice,
struct iris_batch *batch,
bool enable);
void genX(emit_aux_map_state)(struct iris_batch *batch);
void genX(invalidate_aux_map_state)(struct iris_batch *batch);
/* iris_blorp.c */
void genX(init_blorp)(struct iris_context *ice);

39
src/gallium/drivers/iris/iris_state.c
View File

@ -880,6 +880,11 @@ iris_alloc_push_constants(struct iris_batch *batch)
}
}
#if GEN_GEN >= 12
static void
init_aux_map_state(struct iris_batch *batch);
#endif
/**
* Upload the initial GPU state for a render context.
*
@ -996,6 +1001,10 @@ iris_init_render_context(struct iris_batch *batch)
iris_emit_cmd(batch, GENX(3DSTATE_POLY_STIPPLE_OFFSET), foo);
iris_alloc_push_constants(batch);
#if GEN_GEN >= 12
init_aux_map_state(batch);
#endif
}
static void
@ -1025,6 +1034,11 @@ iris_init_compute_context(struct iris_batch *batch)
if (devinfo->is_geminilake)
init_glk_barrier_mode(batch, GLK_BARRIER_MODE_GPGPU);
#endif
#if GEN_GEN >= 12
init_aux_map_state(batch);
#endif
}
struct iris_vertex_buffer_state {
@ -5097,7 +5111,7 @@ iris_viewport_zmin_zmax(const struct pipe_viewport_state *vp, bool halfz,
#if GEN_GEN >= 12
void
genX(emit_aux_map_state)(struct iris_batch *batch)
genX(invalidate_aux_map_state)(struct iris_batch *batch)
{
struct iris_screen *screen = batch->screen;
void *aux_map_ctx = iris_bufmgr_get_aux_map_context(screen->bufmgr);
@ -5110,13 +5124,24 @@ genX(emit_aux_map_state)(struct iris_batch *batch)
* translation table address, and also to invalidate any previously
* cached translations.
*/
uint64_t base_addr = gen_aux_map_get_base(aux_map_ctx);
assert(base_addr != 0 && align64(base_addr, 32 * 1024) == base_addr);
iris_load_register_imm64(batch, GENX(GFX_AUX_TABLE_BASE_ADDR_num),
base_addr);
iris_load_register_imm32(batch, GENX(GFX_CCS_AUX_INV_num), 1);
batch->last_aux_map_state = aux_map_state_num;
}
}
static void
init_aux_map_state(struct iris_batch *batch)
{
struct iris_screen *screen = batch->screen;
void *aux_map_ctx = iris_bufmgr_get_aux_map_context(screen->bufmgr);
if (!aux_map_ctx)
return;
uint64_t base_addr = gen_aux_map_get_base(aux_map_ctx);
assert(base_addr != 0 && align64(base_addr, 32 * 1024) == base_addr);
iris_load_register_imm64(batch, GENX(GFX_AUX_TABLE_BASE_ADDR_num),
base_addr);
}
#endif
struct push_bos {
@ -6174,7 +6199,7 @@ iris_upload_dirty_render_state(struct iris_context *ice,
genX(emit_hashing_mode)(ice, batch, UINT_MAX, UINT_MAX, 1);
#if GEN_GEN >= 12
genX(emit_aux_map_state)(batch);
genX(invalidate_aux_map_state)(batch);
#endif
}
@ -6431,7 +6456,7 @@ iris_upload_compute_state(struct iris_context *ice,
iris_use_pinned_bo(batch, ice->state.border_color_pool.bo, false);
#if GEN_GEN >= 12
genX(emit_aux_map_state)(batch);
genX(invalidate_aux_map_state)(batch);
#endif
if (dirty & IRIS_DIRTY_CS) {