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intel/compiler: handle 16-bit to 64-bit conversions in BSW platforms 

These are subject to the general restriction that anything that is converted
to 64-bit needs to be aligned to 64-bit.  We had this already in place for
32-bit to 64-bit conversions, so this patch generalizes the implementation
to take effect on any conversion to 64-bit from a source smaller than
64-bit.

Fixes assembly validation errors in the following CTS tests in BSW:
dEQP-VK.spirv_assembly.instruction.compute.sconvert.int16_to_int64
dEQP-VK.spirv_assembly.instruction.compute.uconvert.uint16_to_uint64
dEQP-VK.spirv_assembly.instruction.compute.sconvert.int16_to_uint64

Tested-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Iago Toral Quiroga 2018-05-04 09:55:55 +02:00
parent 9d1ff2261c
commit a75f967388
1 changed files with 4 additions and 4 deletions
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8
src/intel/compiler/brw_fs_nir.cpp
View File

@ -785,12 +785,12 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
* the same qword.
* (...)"
*
* This means that 32-bit to 64-bit conversions need to have the 32-bit
* data elements aligned to 64-bit. This restriction does not apply to
* BDW and later.
* This means that conversions from bit-sizes smaller than 64-bit to
* 64-bit need to have the source data elements aligned to 64-bit.
* This restriction does not apply to BDW and later.
*/
if (nir_dest_bit_size(instr->dest.dest) == 64 &&
nir_src_bit_size(instr->src[0].src) == 32 &&
nir_src_bit_size(instr->src[0].src) < 64 &&
(devinfo->is_cherryview || gen_device_info_is_9lp(devinfo))) {
fs_reg tmp = bld.vgrf(result.type, 1);
tmp = subscript(tmp, op[0].type, 0);